Add RP2040 WS2812 PIO+DMA driver

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-02-19 11:19:49 +13:00
parent a3510ab164
commit a3ab572851
2 changed files with 201 additions and 0 deletions
--- a/pico/lib/dma.py
+++ b/pico/lib/dma.py
@@ -0,0 +1,118 @@
+from machine import Pin
+from rp2 import PIO, StateMachine, asm_pio
+from time import sleep
+import array
+import uctypes
+from uctypes import BF_POS, BF_LEN, UINT32, BFUINT32, struct
+
+PIO0_BASE       = 0x50200000
+PIO1_BASE       = 0x50300000
+DMA_BASE        = 0x50000000
+DMA_CHAN_WIDTH  = 0x40
+DMA_CHAN_COUNT  = 12
+
+DMA_SIZE_BYTE = 0x0
+DMA_SIZE_HALFWORD = 0x1
+DMA_SIZE_WORD = 0x2
+
+# DMA: RP2040 datasheet 2.5.7
+DMA_CTRL_TRIG_FIELDS = {
+    "AHB_ERROR":   31<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "READ_ERROR":  30<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "WRITE_ERROR": 29<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "BUSY":        24<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "SNIFF_EN":    23<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "BSWAP":       22<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "IRQ_QUIET":   21<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "TREQ_SEL":    15<<BF_POS | 6<<BF_LEN | BFUINT32,
+    "CHAIN_TO":    11<<BF_POS | 4<<BF_LEN | BFUINT32,
+    "RING_SEL":    10<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "RING_SIZE":    6<<BF_POS | 4<<BF_LEN | BFUINT32,
+    "INCR_WRITE":   5<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "INCR_READ":    4<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "DATA_SIZE":    2<<BF_POS | 2<<BF_LEN | BFUINT32,
+    "HIGH_PRIORITY":1<<BF_POS | 1<<BF_LEN | BFUINT32,
+    "EN":           0<<BF_POS | 1<<BF_LEN | BFUINT32
+}
+# Channel-specific DMA registers
+DMA_CHAN_REGS = {
+    "READ_ADDR_REG":       0x00|UINT32,
+    "WRITE_ADDR_REG":      0x04|UINT32,
+    "TRANS_COUNT_REG":     0x08|UINT32,
+    "CTRL_TRIG_REG":       0x0c|UINT32,
+    "CTRL_TRIG":          (0x0c,DMA_CTRL_TRIG_FIELDS)
+}
+
+# General DMA registers
+DMA_REGS = {
+    "INTR":               0x400|UINT32,
+    "INTE0":              0x404|UINT32,
+    "INTF0":              0x408|UINT32,
+    "INTS0":              0x40c|UINT32,
+    "INTE1":              0x414|UINT32,
+    "INTF1":              0x418|UINT32,
+    "INTS1":              0x41c|UINT32,
+    "TIMER0":             0x420|UINT32,
+    "TIMER1":             0x424|UINT32,
+    "TIMER2":             0x428|UINT32,
+    "TIMER3":             0x42c|UINT32,
+    "MULTI_CHAN_TRIGGER": 0x430|UINT32,
+    "SNIFF_CTRL":         0x434|UINT32,
+    "SNIFF_DATA":         0x438|UINT32,
+    "FIFO_LEVELS":        0x440|UINT32,
+    "CHAN_ABORT":         0x444|UINT32
+}
+
+DMA_CHANS = [struct(DMA_BASE + n*DMA_CHAN_WIDTH, DMA_CHAN_REGS) for n in range(0,DMA_CHAN_COUNT)]
+DMA_DEVICE = struct(DMA_BASE, DMA_REGS)
+
+DMA_CH0_AL3_TRANS_COUNT = DMA_BASE + 0x38
+
+class PIO_DMA_Transfer():
+    def __init__(self, dma_channel, sm_num, block_size, transfer_count):
+        self.dma_chan = DMA_CHANS[dma_channel]
+        self.channel_number = dma_channel
+       
+        if (sm_num >= 0 and sm_num < 4):
+            self.dma_chan.WRITE_ADDR_REG = PIO0_BASE + 0x10 + sm_num *4
+            self.dma_chan.CTRL_TRIG.TREQ_SEL = sm_num
+        elif (sm_num < 8):
+            self.dma_chan.WRITE_ADDR_REG = PIO1_BASE + 0x10 + (sm_num-4) *4
+            self.dma_chan.CTRL_TRIG.TREQ_SEL = sm_num + 4
+        
+        if (block_size == 8):
+            self.dma_chan.CTRL_TRIG.DATA_SIZE = DMA_SIZE_BYTE
+        if (block_size == 16):
+            self.dma_chan.CTRL_TRIG.DATA_SIZE = DMA_SIZE_HALFWORD
+        if (block_size == 32):
+            self.dma_chan.CTRL_TRIG.DATA_SIZE = DMA_SIZE_WORD
+            
+        self.dma_chan.TRANS_COUNT_REG = transfer_count
+        
+        #Do I just always want these?
+        self.dma_chan.CTRL_TRIG.INCR_WRITE = 0
+        self.dma_chan.CTRL_TRIG.INCR_READ = 1
+            
+    def start_transfer(self, buffer, offset=0):
+        """Start DMA from buffer at byte offset (no copy; DMA reads from buffer + offset)."""
+        self.dma_chan.READ_ADDR_REG = uctypes.addressof(buffer) + offset
+        self.dma_chan.CTRL_TRIG.EN = 1
+
+    def transfer_count(self):
+        return self.dma_chan.TRANS_COUNT_REG
+    
+    def busy(self):
+        if self.dma_chan.CTRL_TRIG.DATA_SIZE == 1:
+            return True
+        else:
+            return False
+        
+
+        
+
+
+
+
+
+
+