avr32 cleanup, now does flash read and verify
git-svn-id: svn://svn.savannah.nongnu.org/avrdude/trunk/avrdude@870 81a1dc3b-b13d-400b-aceb-764788c761c2
This commit is contained in:
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10
ChangeLog
10
ChangeLog
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@ -1,7 +1,15 @@
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2009-10-12 David Hoerl <dhoerl@mac.com>
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* main.c: removed some avr32 code that was pushed into jtagmkII.c
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* jtagmkII.c: consolodated the avr32 reset code and avr32_chipreset
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* avrpart.h: modified AVRPART flags for avr32
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* lexer.l: added is_avr32 flag - only way to get yacc code to set flag
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* avrdude.conf.in: updated avr32 section to include "is_avr32" flag
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2009-10-12 David Hoerl <dhoerl@mac.com>
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* config_gram.y: Restored inadvertantly removed buspirate entry
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* lexer.l.y: Restored inadvertantly removed buspirate entry
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* lexer.l: Restored inadvertantly removed buspirate entry
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2009-10-12 Michal Ludvig <mludvig@logix.net.nz>
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118
avrdude.conf.in
118
avrdude.conf.in
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@ -15051,119 +15051,11 @@ part
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memory "flash"
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paged = yes;
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page_size = 512; # bytes
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num_pages = 1024 ; # numeric
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size = 0x00080000;
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offset = 0x80000000;
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readsize = 512;
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page_size = 512; # bytes
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readsize = 512; # bytes
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num_pages = 1024; # could be set dynamicly
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size = 0x00080000; # could be set dynamicly
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offset = 0x80000000;
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;
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;
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# part
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# id = <id> ; # quoted string
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# desc = <description> ; # quoted string
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# has_jtag = <yes/no> ; # part has JTAG i/f
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# has_debugwire = <yes/no> ; # part has debugWire i/f
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# devicecode = <num> ; # deprecated, use stk500_devcode
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# stk500_devcode = <num> ; # numeric
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# avr910_devcode = <num> ; # numeric
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# signature = <num> <num> <num> ; # signature bytes
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# chip_erase_delay = <num> ; # micro-seconds
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# reset = dedicated | io;
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# retry_pulse = reset | sck;
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# pgm_enable = <instruction format> ;
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# chip_erase = <instruction format> ;
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# chip_erase_delay = <num> ; # chip erase delay (us)
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# # STK500 parameters (parallel programming IO lines)
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# pagel = <num> ; # pin name in hex, i.e., 0xD7
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# bs2 = <num> ; # pin name in hex, i.e., 0xA0
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# serial = <yes/no> ; # can use serial downloading
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# parallel = <yes/no/pseudo>; # can use par. programming
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# # STK500v2 parameters, to be taken from Atmel's XML files
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# timeout = <num> ;
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# stabdelay = <num> ;
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# cmdexedelay = <num> ;
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# synchloops = <num> ;
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# bytedelay = <num> ;
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# pollvalue = <num> ;
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# pollindex = <num> ;
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# predelay = <num> ;
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# postdelay = <num> ;
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# pollmethod = <num> ;
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# mode = <num> ;
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# delay = <num> ;
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# blocksize = <num> ;
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# readsize = <num> ;
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# hvspcmdexedelay = <num> ;
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# # STK500v2 HV programming parameters, from XML
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# pp_controlstack = <num>, <num>, ...; # PP only
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# hvsp_controlstack = <num>, <num>, ...; # HVSP only
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# hventerstabdelay = <num>;
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# progmodedelay = <num>; # PP only
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# latchcycles = <num>;
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# togglevtg = <num>;
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# poweroffdelay = <num>;
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# resetdelayms = <num>;
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# resetdelayus = <num>;
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# hvleavestabdelay = <num>;
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# resetdelay = <num>;
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# synchcycles = <num>; # HVSP only
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# chiperasepulsewidth = <num>; # PP only
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# chiperasepolltimeout = <num>;
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# chiperasetime = <num>; # HVSP only
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# programfusepulsewidth = <num>; # PP only
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# programfusepolltimeout = <num>;
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# programlockpulsewidth = <num>; # PP only
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# programlockpolltimeout = <num>;
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# # JTAG ICE mkII parameters, also from XML files
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# allowfullpagebitstream = <yes/no> ;
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# enablepageprogramming = <yes/no> ;
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# idr = <num> ; # IO addr of IDR (OCD) reg.
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# rampz = <num> ; # IO addr of RAMPZ reg.
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# spmcr = <num> ; # mem addr of SPMC[S]R reg.
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# eecr = <num> ; # mem addr of EECR reg.
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# # (only when != 0x3c)
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#
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# memory <memtype>
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# paged = <yes/no> ; # yes / no
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# size = <num> ; # bytes
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# page_size = <num> ; # bytes
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# num_pages = <num> ; # numeric
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# min_write_delay = <num> ; # micro-seconds
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# max_write_delay = <num> ; # micro-seconds
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# readback_p1 = <num> ; # byte value
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# readback_p2 = <num> ; # byte value
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# pwroff_after_write = <yes/no> ; # yes / no
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# read = <instruction format> ;
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# write = <instruction format> ;
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# read_lo = <instruction format> ;
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# read_hi = <instruction format> ;
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# write_lo = <instruction format> ;
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# write_hi = <instruction format> ;
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# loadpage_lo = <instruction format> ;
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# loadpage_hi = <instruction format> ;
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# writepage = <instruction format> ;
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# ;
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# ;
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# <flash_read_delay time="1000" to_rev="8"/>
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# <avr_reset domains="5"/>
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# <core_name>STILETTO</core_name>
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# <flashc id="I7503" name="FLASHC" revision="2.0.0" address="0xFFFE1400" page_size="512" pages_pr_region="64" flash_size="524288">
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# <fuses gp_hi_offset="0xC" gp_lo_offset="0x10"/>
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# </flashc>
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# <pm address="0xFFFF0C00"/>
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# <memory>
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# <block name="EBI_CS0" type="EXT_SRAM" address="0xC0000000" size="0x01000000"/>
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# <block name="EBI_CS1" type="EXT_SRAM" address="0xD0000000" size="0x08000000"/>
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# <block name="EBI_CS2" type="EXT_SRAM" address="0xC8000000" size="0x01000000"/>
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# <block name="EBI_CS3" type="EXT_SRAM" address="0xCC000000" size="0x01000000"/>
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# <block name="FLASH" type="FLASH" address="0x80000000" size="0x00080000"/>
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# <block name="SRAM" type="INT_SRAM" address="0x00000000" size="0x00010000"/>
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# <block name="USBB_SLAVE" type="INT_SRAM" address="0xE0000000" size="0x00800000"/>
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# </memory>
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@ -90,7 +90,8 @@ typedef struct opcode {
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#define AVRPART_HAS_DW 0x0040 /* part has a debugWire i/f */
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#define AVRPART_HAS_PDI 0x0080 /* part has PDI i/f rather than ISP (ATxmega) */
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#define AVRPART_AVR32 0x0100 /* part is in AVR32 family */
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#define AVRPART_CHIP_ERASE 0x0200 /* part will undergo chip erase */
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#define AVRPART_INIT_SMC 0x0200 /* part will undergo chip erase */
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#define AVRPART_WRITE 0x0400 /* at least one write operation specified */
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#define AVR_DESCLEN 64
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#define AVR_IDLEN 32
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275
jtagmkII.c
275
jtagmkII.c
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@ -2563,6 +2563,10 @@ static int jtagmkII_avr32_reset(PROGRAMMER * pgm, unsigned char val, unsigned ch
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int status;
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unsigned char buf[3], *resp;
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if(verbose) fprintf(stderr,
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"%s: jtagmkII_avr32_reset(%2.2x)\n",
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progname, val);
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buf[0] = CMND_GET_IR;
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buf[1] = 0x0C;
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status = jtagmkII_send(pgm, buf, 2);
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@ -2596,9 +2600,11 @@ static int jtagmkII_avr32_reset(PROGRAMMER * pgm, unsigned char val, unsigned ch
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return 0;
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}
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#define AVR32_RESET_READ_IR 0x0001
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#define AVR32_RESET_READ_READ_CHIPINFO 0x0002
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#define AVR32_SET4RUNNING 0x0004
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#define AVR32_RESET_READ 0x0001
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#define AVR32_RESET_WRITE 0x0002
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#define AVR32_RESET_CHIP_ERASE 0x0004
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#define AVR32_SET4RUNNING 0x0008
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//#define AVR32_RESET_COMMON (AVR32_RESET_READ | AVR32_RESET_WRITE | AVR32_RESET_CHIP_ERASE )
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// At init: AVR32_RESET_READ_IR | AVR32_RESET_READ_READ_CHIPINFO
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static int jtagmkII_reset32(PROGRAMMER * pgm, unsigned short flags)
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@ -2608,8 +2614,12 @@ static int jtagmkII_reset32(PROGRAMMER * pgm, unsigned short flags)
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unsigned long val=0;
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unsigned long config0, config1;
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if(verbose) fprintf(stderr,
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"%s: jtagmkII_reset32(%2.2x)\n",
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progname, flags);
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// Happens at the start of a programming operation
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if(flags & AVR32_RESET_READ_IR) {
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if(flags & AVR32_RESET_READ) {
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buf[0] = CMND_GET_IR;
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buf[1] = 0x11;
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status = jtagmkII_send(pgm, buf, 2);
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@ -2620,48 +2630,63 @@ static int jtagmkII_reset32(PROGRAMMER * pgm, unsigned short flags)
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{lineno = __LINE__; goto eRR;};
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}
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// AVR_RESET(0x1F), AVR_RESET(0x07)
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status = jtagmkII_avr32_reset(pgm, 0x1F, 0x01, 0x00);
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if(status < 0) {lineno = __LINE__; goto eRR;}
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status = jtagmkII_avr32_reset(pgm, 0x07, 0x11, 0x1F);
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if(status < 0) {lineno = __LINE__; goto eRR;}
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val = jtagmkII_read_SABaddr(pgm, AVR32_DS, 0x01);
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if(val != 0) {lineno = __LINE__; goto eRR;}
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val = jtagmkII_read_SABaddr(pgm, AVR32_DC, 0x01);
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if(val != 0) {lineno = __LINE__; goto eRR;}
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status = jtagmkII_write_SABaddr(pgm, AVR32_DC, 0x01, AVR32_DC_ABORT | AVR32_DC_RESET | AVR32_DC_DBE | AVR32_DC_DBR);
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if(status < 0) return -1;
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// Read OCD Register a bunch of times...
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for(j=0; j<21; ++j) {
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val = jtagmkII_read_SABaddr(pgm, AVR32_DS, 0x01);
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if(flags & (AVR32_RESET_WRITE | AVR32_SET4RUNNING)) {
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// AVR_RESET(0x1F)
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status = jtagmkII_avr32_reset(pgm, 0x1F, 0x01, 0x00);
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if(status < 0) {lineno = __LINE__; goto eRR;}
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// AVR_RESET(0x07)
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status = jtagmkII_avr32_reset(pgm, 0x07, 0x11, 0x1F);
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if(status < 0) {lineno = __LINE__; goto eRR;}
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}
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if(val != 0x04000000) {lineno = __LINE__; goto eRR;}
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// AVR_RESET(0x00)
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status = jtagmkII_avr32_reset(pgm, 0x00, 0x01, 0x07);
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if(status < 0) {lineno = __LINE__; goto eRR;}
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for(j=0; j<2; ++j) {
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//if(flags & AVR32_RESET_COMMON)
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{
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val = jtagmkII_read_SABaddr(pgm, AVR32_DS, 0x01);
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if(val == ERROR_SAB) {lineno = __LINE__; goto eRR;}
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if((val&0x05000020) != 0x05000020) {lineno = __LINE__; goto eRR;}
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if(val != 0) {lineno = __LINE__; goto eRR;}
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val = jtagmkII_read_SABaddr(pgm, AVR32_DC, 0x01);
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if(val != 0) {lineno = __LINE__; goto eRR;}
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}
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status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe7b00044); // mtdr 272, R0
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if(status < 0) {lineno = __LINE__; goto eRR;}
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val = jtagmkII_read_SABaddr(pgm, AVR32_DCSR, 0x01);
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if(val != 0x00000001) {lineno = __LINE__; goto eRR;}
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if(flags & (AVR32_RESET_READ | AVR32_RESET_CHIP_ERASE)) {
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status = jtagmkII_write_SABaddr(pgm, AVR32_DC, 0x01, AVR32_DC_DBE | AVR32_DC_DBR);
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if(status < 0) return -1;
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}
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val = jtagmkII_read_SABaddr(pgm, AVR32_DCCPU, 0x01);
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if(val != 0x00000000) {lineno = __LINE__; goto eRR;}
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if(flags & (AVR32_RESET_WRITE | AVR32_SET4RUNNING)) {
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status = jtagmkII_write_SABaddr(pgm, AVR32_DC, 0x01, AVR32_DC_ABORT | AVR32_DC_RESET | AVR32_DC_DBE | AVR32_DC_DBR);
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if(status < 0) return -1;
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for(j=0; j<21; ++j) {
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val = jtagmkII_read_SABaddr(pgm, AVR32_DS, 0x01);
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}
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if(val != 0x04000000) {lineno = __LINE__; goto eRR;}
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// AVR_RESET(0x00)
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status = jtagmkII_avr32_reset(pgm, 0x00, 0x01, 0x07);
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if(status < 0) {lineno = __LINE__; goto eRR;}
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}
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// if(flags & (AVR32_RESET_READ | AVR32_RESET_WRITE))
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{
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for(j=0; j<2; ++j) {
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val = jtagmkII_read_SABaddr(pgm, AVR32_DS, 0x01);
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if(val == ERROR_SAB) {lineno = __LINE__; goto eRR;}
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if((val&0x05000020) != 0x05000020) {lineno = __LINE__; goto eRR;}
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}
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}
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//if(flags & (AVR32_RESET_READ | AVR32_RESET_WRITE | AVR32_RESET_CHIP_ERASE))
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{
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status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe7b00044); // mtdr 272, R0
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if(status < 0) {lineno = __LINE__; goto eRR;}
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val = jtagmkII_read_SABaddr(pgm, AVR32_DCSR, 0x01);
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if(val != 0x00000001) {lineno = __LINE__; goto eRR;}
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val = jtagmkII_read_SABaddr(pgm, AVR32_DCCPU, 0x01);
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if(val != 0x00000000) {lineno = __LINE__; goto eRR;}
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}
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if(flags & AVR32_RESET_READ_READ_CHIPINFO) {
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// Read chip configuration - common for all
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if(flags & (AVR32_RESET_READ | AVR32_RESET_WRITE | AVR32_RESET_CHIP_ERASE)) {
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for(j=0; j<2; ++j) {
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val = jtagmkII_read_SABaddr(pgm, AVR32_DS, 0x01);
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if(val == ERROR_SAB) {lineno = __LINE__; goto eRR;}
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@ -2725,9 +2750,17 @@ static int jtagmkII_reset32(PROGRAMMER * pgm, unsigned short flags)
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status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe5b00045); // mtdr R0, 276
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if(status < 0) {lineno = __LINE__; goto eRR;}
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val = jtagmkII_read_SABaddr(pgm, 0x00000010, 0x06);
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val = jtagmkII_read_SABaddr(pgm, 0x00000010, 0x06); // need to recheck who does this...
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if(val != 0x00000000) {lineno = __LINE__; goto eRR;}
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}
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if(flags & AVR32_RESET_CHIP_ERASE) {
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status = jtagmkII_avr32_reset(pgm, 0x1f, 0x01, 0x00);
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if(status < 0) {lineno = __LINE__; goto eRR;}
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status = jtagmkII_avr32_reset(pgm, 0x01, 0x11, 0x1f);
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if(status < 0) {lineno = __LINE__; goto eRR;}
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}
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if(flags & AVR32_SET4RUNNING) {
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status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe1b00014); // mfsr R0, 80
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if(status < 0) {lineno = __LINE__; goto eRR;}
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@ -2857,7 +2890,7 @@ static int jtagmkII_smc_init32(PROGRAMMER * pgm)
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*/
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static int jtagmkII_initialize32(PROGRAMMER * pgm, AVRPART * p)
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{
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int status, ret, j;
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int status, j;
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unsigned char buf[6], *resp;
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if (jtagmkII_setparm(pgm, PAR_DAISY_CHAIN_INFO, PDATA(pgm)->jtagchain) < 0) {
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@ -2931,89 +2964,32 @@ static int jtagmkII_initialize32(PROGRAMMER * pgm, AVRPART * p)
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}
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free(resp);
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}
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if(!(p->flags & AVRPART_CHIP_ERASE))
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ret = jtagmkII_reset32(pgm, AVR32_RESET_READ_IR | AVR32_RESET_READ_READ_CHIPINFO);
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else
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ret = 0;
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return ret;
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return 0;
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}
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static int jtagmkII_chip_erase32(PROGRAMMER * pgm, AVRPART * p)
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{
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int status=0, j;
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unsigned char *resp, buf[3], x;
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int status=0, loops;
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unsigned char *resp, buf[3], x, ret[4], *retP;
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unsigned long val;
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unsigned int lineno;
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val = jtagmkII_read_SABaddr(pgm, AVR32_DS, 0x01);
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if(val != 0) {lineno = __LINE__; goto eRR;}
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if(verbose) fprintf(stderr,
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"%s: jtagmkII_chip_erase32()\n",
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progname);
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val = jtagmkII_read_SABaddr(pgm, AVR32_DC, 0x01);
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if(val != 0) {lineno = __LINE__; goto eRR;}
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status = jtagmkII_reset32(pgm, AVR32_RESET_CHIP_ERASE);
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if(status != 0) goto eRR;
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// sequence of IR transitions
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ret[0] = 0x01;
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ret[1] = 0x05;
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ret[2] = 0x01;
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ret[3] = 0x00;
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|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DC, 0x01, AVR32_DC_DBE | AVR32_DC_DBR);
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DS, 0x01);
|
||||
if(val == ERROR_SAB) {lineno = __LINE__; goto eRR;}
|
||||
if((val&0x05000020) != 0x05000020) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
for(j=0; j<2; ++j) {
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe7b00044); // mtdr 272, R0
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DCSR, 0x01);
|
||||
if(val != 0x00000001) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DCCPU, 0x01);
|
||||
if(val != 0x00000000) {lineno = __LINE__; goto eRR;}
|
||||
}
|
||||
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe1b00040); // mfsr R0, 256
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe7b00044); // mtdr 272, R0
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DCSR, 0x01);
|
||||
if(val != 0x00000001) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DCCPU, 0x01);
|
||||
if(val != 0x0204098b) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DCEMU, 0x01, 0x00000000);
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe5b00045); // mtdr R0, 276
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DS, 0x01);
|
||||
if(val == ERROR_SAB) {lineno = __LINE__; goto eRR;}
|
||||
if((val&0x05000020) != 0x05000020) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe7b00044); // mtdr 272, R0
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DCSR, 0x01);
|
||||
if(val != 0x00000001) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DCCPU, 0x01);
|
||||
if(val != 0x00000000) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe1b00041); // mfsr R0, 260
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe7b00044); // mtdr 272, R0
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DCSR, 0x01);
|
||||
if(val != 0x00000001) {lineno = __LINE__; goto eRR;}
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_DCCPU, 0x01);
|
||||
if(val != 0x00800000) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DCEMU, 0x01, 0x00000000);
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
status = jtagmkII_write_SABaddr(pgm, AVR32_DINST, 0x01, 0xe5b00045); // mtdr R0, 276
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
val = jtagmkII_read_SABaddr(pgm, 0x00000010, 0x06);
|
||||
if(val != 0x00000000) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
status = jtagmkII_avr32_reset(pgm, 0x1f, 0x01, 0x00);
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
status = jtagmkII_avr32_reset(pgm, 0x01, 0x11, 0x1f);
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
for(;;) {
|
||||
retP = ret;
|
||||
for(loops=0; loops<1000; ++loops) {
|
||||
buf[0] = CMND_GET_IR;
|
||||
buf[1] = 0x0F;
|
||||
status = jtagmkII_send(pgm, buf, 2);
|
||||
|
@ -3025,36 +3001,10 @@ static int jtagmkII_chip_erase32(PROGRAMMER * pgm, AVRPART * p)
|
|||
}
|
||||
x = resp[1];
|
||||
free(resp);
|
||||
if(x == 0x01) break;
|
||||
}
|
||||
for(;;) {
|
||||
buf[0] = CMND_GET_IR;
|
||||
buf[1] = 0x0F;
|
||||
status = jtagmkII_send(pgm, buf, 2);
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
status = jtagmkII_recv(pgm, &resp);
|
||||
if (status != 2 || resp[0] != 0x87) {
|
||||
{lineno = __LINE__; goto eRR;}
|
||||
}
|
||||
x = resp[1];
|
||||
free(resp);
|
||||
if(x == 0x05) break;
|
||||
}
|
||||
for(;;) {
|
||||
buf[0] = CMND_GET_IR;
|
||||
buf[1] = 0x0F;
|
||||
status = jtagmkII_send(pgm, buf, 2);
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
status = jtagmkII_recv(pgm, &resp);
|
||||
if (status != 2 || resp[0] != 0x87) {
|
||||
{lineno = __LINE__; goto eRR;}
|
||||
}
|
||||
x = resp[1];
|
||||
free(resp);
|
||||
if(x== 0x01) break;
|
||||
if(x == *retP) ++retP;
|
||||
if(*retP == 0x00) break;
|
||||
}
|
||||
if(loops == 1000) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
status = jtagmkII_avr32_reset(pgm, 0x00, 0x01, 0x01);
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
|
@ -3062,7 +3012,6 @@ static int jtagmkII_chip_erase32(PROGRAMMER * pgm, AVRPART * p)
|
|||
val = jtagmkII_read_SABaddr(pgm, 0x00000010, 0x06);
|
||||
if(val != 0x00000000) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
|
||||
// AVR32 "special"
|
||||
buf[0] = CMND_SET_PARAMETER;
|
||||
buf[1] = 0x03;
|
||||
|
@ -3071,8 +3020,6 @@ static int jtagmkII_chip_erase32(PROGRAMMER * pgm, AVRPART * p)
|
|||
status = jtagmkII_recv(pgm, &resp);
|
||||
if(status < 0 || resp[0] != RSP_OK) {lineno = __LINE__; goto eRR;}
|
||||
free(resp);
|
||||
|
||||
// pgm->initialize(pgm, p);
|
||||
|
||||
return 0;
|
||||
|
||||
|
@ -3369,6 +3316,25 @@ static int jtagmkII_paged_load32(PROGRAMMER * pgm, AVRPART * p, AVRMEM * m,
|
|||
|
||||
serial_recv_timeout = 256;
|
||||
|
||||
if(!(p->flags & AVRPART_WRITE)) {
|
||||
status = jtagmkII_reset32(pgm, AVR32_RESET_READ);
|
||||
if(status != 0) goto eRR;
|
||||
}
|
||||
|
||||
// Init SMC and set clocks
|
||||
if(!(p->flags & AVRPART_INIT_SMC)) {
|
||||
status = jtagmkII_smc_init32(pgm);
|
||||
if(status != 0) {lineno = __LINE__; goto eRR;} // PLL 0
|
||||
p->flags |= AVRPART_INIT_SMC;
|
||||
}
|
||||
|
||||
// Init SMC and set clocks
|
||||
if(!(p->flags & AVRPART_INIT_SMC)) {
|
||||
status = jtagmkII_smc_init32(pgm);
|
||||
if(status != 0) {lineno = __LINE__; goto eRR;} // PLL 0
|
||||
p->flags |= AVRPART_INIT_SMC;
|
||||
}
|
||||
|
||||
//fprintf(stderr, "\n pageSize=%d bytes=%d pages=%d m->offset=0x%x pgm->page_size %d\n", page_size, n_bytes, pages, m->offset, pgm->page_size);
|
||||
|
||||
cmd[0] = CMND_READ_MEMORY32;
|
||||
|
@ -3377,6 +3343,8 @@ static int jtagmkII_paged_load32(PROGRAMMER * pgm, AVRPART * p, AVRMEM * m,
|
|||
|
||||
addr = 0;
|
||||
for (addr = 0; addr < n_bytes; addr += block_size) {
|
||||
report_progress(addr, n_bytes, NULL);
|
||||
|
||||
block_size = ((n_bytes-addr) < pgm->page_size) ? (n_bytes - addr) : pgm->page_size;
|
||||
if (verbose >= 3)
|
||||
fprintf(stderr, "%s: jtagmkII_paged_load32(): "
|
||||
|
@ -3404,7 +3372,6 @@ static int jtagmkII_paged_load32(PROGRAMMER * pgm, AVRPART * p, AVRMEM * m,
|
|||
memcpy(m->buf + addr, resp + 1, block_size);
|
||||
free(resp);
|
||||
|
||||
report_progress(addr, n_bytes, NULL);
|
||||
}
|
||||
|
||||
serial_recv_timeout = otimeout;
|
||||
|
@ -3416,7 +3383,6 @@ static int jtagmkII_paged_load32(PROGRAMMER * pgm, AVRPART * p, AVRMEM * m,
|
|||
|
||||
eRR:
|
||||
serial_recv_timeout = otimeout;
|
||||
free(cmd);
|
||||
fprintf(stderr,
|
||||
"%s: jtagmkII_paged_load32(): "
|
||||
"failed at line %d (status=%x val=%lx)\n",
|
||||
|
@ -3438,6 +3404,10 @@ static int jtagmkII_paged_write32(PROGRAMMER * pgm, AVRPART * p, AVRMEM * m,
|
|||
|
||||
if(n_bytes == 0) return -1;
|
||||
|
||||
status = jtagmkII_reset32(pgm, AVR32_RESET_WRITE);
|
||||
if(status != 0) goto eRR;
|
||||
p->flags |= AVRPART_WRITE;
|
||||
|
||||
pages = (n_bytes-1)/page_size + 1;
|
||||
//fprintf(stderr, "\n pageSize=%d bytes=%d pages=%d m->offset=0x%x pgm->page_size %d\n", page_size, n_bytes, pages, m->offset, pgm->page_size);
|
||||
|
||||
|
@ -3448,8 +3418,11 @@ static int jtagmkII_paged_write32(PROGRAMMER * pgm, AVRPART * p, AVRMEM * m,
|
|||
}
|
||||
|
||||
// Init SMC and set clocks
|
||||
status = jtagmkII_smc_init32(pgm);
|
||||
if(status != 0) {lineno = __LINE__; goto eRR;} // PLL 0
|
||||
if(!(p->flags & AVRPART_INIT_SMC)) {
|
||||
status = jtagmkII_smc_init32(pgm);
|
||||
if(status != 0) {lineno = __LINE__; goto eRR;} // PLL 0
|
||||
p->flags |= AVRPART_INIT_SMC;
|
||||
}
|
||||
|
||||
// First unlock the pages
|
||||
for(pageNum=0; pageNum < pages; ++pageNum) {
|
||||
|
@ -3469,6 +3442,9 @@ static int jtagmkII_paged_write32(PROGRAMMER * pgm, AVRPART * p, AVRMEM * m,
|
|||
|
||||
addr = 0;
|
||||
for(pageNum=0; pageNum < pages; ++pageNum) {
|
||||
|
||||
report_progress(addr, n_bytes, NULL);
|
||||
|
||||
#if 0
|
||||
val = jtagmkII_read_SABaddr(pgm, AVR32_FLASHC_FSR, 0x05);
|
||||
if(val == ERROR_SAB) {lineno = __LINE__; goto eRR;}
|
||||
|
@ -3512,10 +3488,7 @@ static int jtagmkII_paged_write32(PROGRAMMER * pgm, AVRPART * p, AVRMEM * m,
|
|||
}
|
||||
status = jtagmkII_flash_write_page32(pgm, pageNum);
|
||||
if(status < 0) {lineno = __LINE__; goto eRR;}
|
||||
|
||||
report_progress(addr, n_bytes, NULL);
|
||||
}
|
||||
|
||||
free(cmd);
|
||||
serial_recv_timeout = otimeout;
|
||||
|
||||
|
|
1
lexer.l
1
lexer.l
|
@ -150,6 +150,7 @@ has_debugwire { yylval=NULL; return K_HAS_DW; }
|
|||
has_pdi { yylval=NULL; return K_HAS_PDI; }
|
||||
id { yylval=NULL; return K_ID; }
|
||||
idr { yylval=NULL; return K_IDR; }
|
||||
is_avr32 { yylval=NULL; return K_IS_AVR32; }
|
||||
jtagmki { yylval=NULL; return K_JTAG_MKI; }
|
||||
jtagmkii { yylval=NULL; return K_JTAG_MKII; }
|
||||
jtagmkii_avr32 { yylval=NULL; return K_JTAG_MKII_AVR32; }
|
||||
|
|
Loading…
Reference in New Issue