* jtag3.c: Fill in the missing pieces for Xmega support (both,
PDI and JTAG). * jtagmkII.c (jtagmkII_set_xmega_params): Use "fuse1" rather than "fuse0" memory space to fill in the NVM offset from, as there is no "fuse0" on some Xmega devices. git-svn-id: svn://svn.savannah.nongnu.org/avrdude/trunk/avrdude@1111 81a1dc3b-b13d-400b-aceb-764788c761c2
This commit is contained in:
parent
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2abf90726e
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@ -1,3 +1,11 @@
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2012-11-29 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
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* jtag3.c: Fill in the missing pieces for Xmega support (both,
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PDI and JTAG).
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* jtagmkII.c (jtagmkII_set_xmega_params): Use "fuse1" rather
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than "fuse0" memory space to fill in the NVM offset from, as
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there is no "fuse0" on some Xmega devices.
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2012-11-29 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
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* avrdude.conf.in (ATmega256RFR2, ATmega128RFR2, ATmega64RFR2):
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2
NEWS
2
NEWS
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@ -35,7 +35,7 @@ Current:
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X3(1), sck = DSR X3(2), mosi = DCD X3(3), reset = RI X3(4))
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+ diecimila (alias for arduino-ft232r)
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- Atmel JTAGICE3 (megaAVR/JTAG only so far)
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- Atmel JTAGICE3 (megaAVR/JTAG, Xmega/JTAG/PDI only so far)
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* Bugfixes
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- bug #34027: avrdude AT90S1200 Problem
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79
jtag3.c
79
jtag3.c
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@ -759,6 +759,42 @@ static int jtag3_initialize(PROGRAMMER * pgm, AVRPART * p)
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if ((p->flags & AVRPART_HAS_PDI))
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{
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struct xmega_device_desc xd;
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LNODEID ln;
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AVRMEM * m;
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u16_to_b2(xd.nvm_base_addr, p->nvm_base);
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u16_to_b2(xd.mcu_base_addr, p->mcu_base);
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for (ln = lfirst(p->mem); ln; ln = lnext(ln)) {
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m = ldata(ln);
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if (strcmp(m->desc, "flash") == 0) {
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PDATA(pgm)->flash_pagesize = m->page_size;
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u16_to_b2(xd.flash_page_size, m->page_size);
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} else if (strcmp(m->desc, "eeprom") == 0) {
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xd.eeprom_page_size = m->page_size;
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u16_to_b2(xd.eeprom_size, m->size);
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u32_to_b4(xd.nvm_eeprom_offset, m->offset);
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} else if (strcmp(m->desc, "application") == 0) {
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u32_to_b4(xd.app_size, m->size);
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u32_to_b4(xd.nvm_app_offset, m->offset);
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} else if (strcmp(m->desc, "boot") == 0) {
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u16_to_b2(xd.boot_size, m->size);
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u32_to_b4(xd.nvm_boot_offset, m->offset);
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} else if (strcmp(m->desc, "fuse1") == 0) {
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u32_to_b4(xd.nvm_fuse_offset, m->offset & ~7);
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} else if (strcmp(m->desc, "lock") == 0) {
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u32_to_b4(xd.nvm_lock_offset, m->offset);
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} else if (strcmp(m->desc, "usersig") == 0) {
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u32_to_b4(xd.nvm_user_sig_offset, m->offset);
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} else if (strcmp(m->desc, "prodsig") == 0) {
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u32_to_b4(xd.nvm_prod_sig_offset, m->offset);
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} else if (strcmp(m->desc, "data") == 0) {
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u32_to_b4(xd.nvm_data_offset, m->offset);
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}
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}
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if (jtag3_setparm(pgm, SCOPE_AVR, 2, PARM3_DEVICEDESC, (unsigned char *)&xd, sizeof xd) < 0)
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return -1;
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}
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else
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{
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@ -784,21 +820,19 @@ static int jtag3_initialize(PROGRAMMER * pgm, AVRPART * p)
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}
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//md.sram_offset[2] = p->sram; // do we need it?
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u16_to_b2(md.sram_offset, 0x200);
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md.ocd_revision = 3; /* XXX! */
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md.always_one = 1;
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md.allow_full_page_bitstream = (p->flags & AVRPART_ALLOWFULLPAGEBITSTREAM) != 0;
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md.idr_address = p->idr;
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if (p->eecr == 0)
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p->eecr = 0x1f; /* matches most "modern" mega/tiny AVRs */
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md.eearh_address = p->eecr + 3;
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md.eearl_address = p->eecr + 2;
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md.eecr_address = p->eecr;
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md.eedr_address = p->eecr + 1;
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p->eecr = 0x3f; /* matches most "modern" mega/tiny AVRs */
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md.eearh_address = p->eecr - 0x20 + 3;
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md.eearl_address = p->eecr - 0x20 + 2;
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md.eecr_address = p->eecr - 0x20;
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md.eedr_address = p->eecr - 0x20 + 1;
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md.spmcr_address = p->spmcr;
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//md.osccal_address = p->osccal; // do we need it at all?
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md.osccal_address = 0x46; /* XXX */
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if (jtag3_setparm(pgm, SCOPE_AVR, 2, PARM3_DEVICEDESC, (unsigned char *)&md, sizeof md) < 0)
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return -1;
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@ -827,6 +861,23 @@ static int jtag3_initialize(PROGRAMMER * pgm, AVRPART * p)
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free(resp);
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PDATA(pgm)->boot_start = ULONG_MAX;
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if ((p->flags & AVRPART_HAS_PDI)) {
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/*
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* Find out where the border between application and boot area
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* is.
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*/
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AVRMEM *bootmem = avr_locate_mem(p, "boot");
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AVRMEM *flashmem = avr_locate_mem(p, "flash");
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if (bootmem == NULL || flashmem == NULL) {
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fprintf(stderr,
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"%s: jtagmk3_initialize(): Cannot locate \"flash\" and \"boot\" memories in description\n",
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progname);
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} else {
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PDATA(pgm)->boot_start = bootmem->offset - flashmem->offset;
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}
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}
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free(PDATA(pgm)->flash_pagecache);
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free(PDATA(pgm)->eeprom_pagecache);
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if ((PDATA(pgm)->flash_pagecache = malloc(PDATA(pgm)->flash_pagesize)) == NULL) {
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static unsigned int jtag3_memaddr(PROGRAMMER * pgm, AVRPART * p, AVRMEM * m, unsigned long addr)
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{
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#if 0
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/*
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* Xmega devices handled by V7+ firmware don't want to be told their
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* m->offset within the write memory command.
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*/
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if (PDATA(pgm)->fwver >= 0x700 && (p->flags & AVRPART_HAS_PDI) != 0) {
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if ((p->flags & AVRPART_HAS_PDI) != 0) {
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if (addr >= PDATA(pgm)->boot_start)
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/*
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* all memories but "flash" are smaller than boot_start anyway, so
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return addr;
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}
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/*
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* Old firmware, or non-Xmega device. Non-Xmega (and non-AVR32)
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* devices always have an m->offset of 0, so we don't have to
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* distinguish them here.
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* Non-Xmega device.
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*/
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#endif
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return addr + m->offset;
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return addr;
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}
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} else if (strcmp(m->desc, "boot") == 0) {
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u16_to_b2(sendbuf.dd.boot_size, m->size);
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u32_to_b4(sendbuf.dd.nvm_boot_offset, m->offset);
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} else if (strcmp(m->desc, "fuse0") == 0) {
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u32_to_b4(sendbuf.dd.nvm_fuse_offset, m->offset);
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} else if (strcmp(m->desc, "fuse1") == 0) {
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u32_to_b4(sendbuf.dd.nvm_fuse_offset, m->offset & ~7);
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} else if (strcmp(m->desc, "lock") == 0) {
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u32_to_b4(sendbuf.dd.nvm_lock_offset, m->offset);
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} else if (strcmp(m->desc, "usersig") == 0) {
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