Intial commit
This commit is contained in:
parent
9024442baa
commit
1c89ad2ea0
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.vscode/
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bin/
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[submodule "lib/usart"]
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path = lib/usart
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url = git@git.chch.tech:avr/usart.git
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.vscode/
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bin/
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MIT License Copyright (c) <year> <copyright holders>
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is furnished
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to do so, subject to the following conditions:
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The above copyright notice and this permission notice (including the next
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paragraph) shall be included in all copies or substantial portions of the
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Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS
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OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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# usart
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MCU=atmega32
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F_CPU=8000000
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PROG=dragon_jtag
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PORT?=/dev/ttyUSB0
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CC=avr-g++
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OBJCOPY=avr-objcopy
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CFLAGS=-Wall -g -mmcu=${MCU} -DF_CPU=${F_CPU} -I.
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TARGET=main
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SRCS= src/*.cpp test/main.cpp
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all: build flash
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build:
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${CC} ${CFLAGS} -o bin/${TARGET}.bin ${SRCS}
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${CC} ${CFLAGS} -o bin/${TARGET}.elf ${SRCS}
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${OBJCOPY} -j .text -j .data -O ihex bin/${TARGET}.bin bin/${TARGET}.hex
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flash:
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avrdude -p ${MCU} -c ${PROG} -U flash:w:bin/main.hex
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clean:
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rm -f bin/*
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term:
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python3 term.py
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avarice:
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avarice --program --file bin/main.elf --part atmega32 --dragon :4242
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include "usart.h"
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namespace usart
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{
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namespace {
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static FILE mystdout;
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}
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void init( unsigned long baud) {
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fdev_setup_stream(&mystdout, put_printf, NULL, _FDEV_SETUP_WRITE);
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stdout = &mystdout;
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const unsigned int ubrr = F_CPU/8/baud-1;
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/*Set baud rate */
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#if defined __AVR_ATmega328P__
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UBRR0H = (unsigned char)(ubrr>>8);
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UBRR0L = (unsigned char)ubrr;
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UCSR0A |= (1<<U2X0);
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//Enable receiver and transmitter
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UCSR0B = (1<<RXEN0)|(1<<TXEN0);
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//UCSRB |= (1<< RXCIE)|(1<<TXCIE);
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/* Set frame format: 8data, 2stop bit */
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UCSR0C = (1<<USBS0)|(3<<UCSZ00);
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#elif defined __AVR_ATmega32__ || defined __AVR_ATmega16__
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UBRRH = (unsigned char)(ubrr>>8);
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UBRRL = (unsigned char)ubrr;
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UCSRA |= (1<<U2X);
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//Enable receiver and transmitter
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UCSRB = (1<<RXEN)|(1<<TXEN);
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//UCSRB |= (1<< RXCIE)|(1<<TXCIE);
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/* Set frame format: 8data, 2stop bit */
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UCSRC = (1 << URSEL)|(3<<UCSZ0);
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#endif
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}
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void put(char data) {
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#if defined __AVR_ATmega328P__
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while ( !( UCSR0A & (1<<UDRE0)) ); UDR0 = data;
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#elif defined __AVR_ATmega32__ || defined __AVR_ATmega16__
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while ( !( UCSRA & (1<<UDRE)) ); UDR = data;
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#endif
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}
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char get( void ) {
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#if defined __AVR_ATmega328P__
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while ( !(UCSR0A & (1<<RXC0)) ); return UDR0;
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#elif defined __AVR_ATmega32__ || defined __AVR_ATmega16__
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while ( !(UCSRA & (1<<RXC)) ); return UDR;
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#endif
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}
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int put_printf(char var, FILE *stream) {
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put(var);
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return 0;
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}
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} // namespace usart
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#pragma once
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#include <stdio.h>
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namespace usart
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{
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void init(unsigned long baud);
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void put(char data );
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char get();
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int put_printf(char var, FILE *stream);
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} // namespace usart
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import serial
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from time import sleep
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with serial.Serial('/dev/ttyUSB0', 9600, timeout=1) as ser:
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ser.write(b'a')
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while True:
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x = ser.read() # read one byte
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if x != b'':
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pass
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print(x.decode('utf'))
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#ser.write(b'a')
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#print(ser.read())
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sleep(1)
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include "../src/usart.h"
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#include <util/delay.h>
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int main (void) {
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DDRD |= (1<<PD3)|(1<<PD4)|(1<<PD5);
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usart::init(9600);
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for (;;) {// Loop forever
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usart::put('A');
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//printf("Hello");
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PORTD ^= (1<<PD3)|(1<<PD4)|(1<<PD5);
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_delay_ms(1000);
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}
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}
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MCU=atmega32
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F_CPU=8000000
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PROG=dragon_jtag
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DEBUGGER = dragon
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PORT=/dev/ttyUSB0
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CC=avr-g++
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OBJCOPY=avr-objcopy
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CFLAGS=-Wall -g -mmcu=${MCU} -DF_CPU=${F_CPU} -I.
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TARGET=main
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SRCS=src/*.cpp test/main.cpp lib/*/src/*.cpp
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default: build flash
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build:
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${CC} ${CFLAGS} -o bin/${TARGET}.bin ${SRCS}
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${CC} ${CFLAGS} -o bin/${TARGET}.elf ${SRCS}
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${OBJCOPY} -j .text -j .data -O ihex bin/${TARGET}.bin bin/${TARGET}.hex
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flash:
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avrdude -p ${MCU} -c ${PROG} -U flash:w:bin/main.hex
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clean:
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rm -f bin/*
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debug: flash avarice
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avr-gdb -ex "target remote :4242" bin/main.elf
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avarice:
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sleep 1
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avarice --file bin/main.elf --part ${MCU} --${DEBUGGER} :4242 &{
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term:
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screen ${PORT} 1000000
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#include "spi.h"
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#include "rc522.h"
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void Write_MFRC522(uchar addr, uchar val)
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{
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spi::cs_low();
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spi::transfer((addr<<1)&0x7E);
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spi::transfer(val);
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spi::cs_high();
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}
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uchar Read_MFRC522(uchar addr)
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{
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uchar val;
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spi::cs_low();
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//address format: 1XXXXXX0
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spi::transfer(((addr<<1)&0x7E) | 0x80);
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val =spi::transfer(0x00);
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spi::cs_high();
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return val;
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}
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void SetBitMask(uchar reg, uchar mask)
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{
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uchar tmp;
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tmp = Read_MFRC522(reg);
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Write_MFRC522(reg, tmp | mask); // set bit mask
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}
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void ClearBitMask(uchar reg, uchar mask)
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{
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uchar tmp;
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tmp = Read_MFRC522(reg);
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Write_MFRC522(reg, tmp & (~mask)); // clear bit mask
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}
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void AntennaOn(void)
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{
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uchar temp;
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temp = Read_MFRC522(TxControlReg);
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if (!(temp & 0x03))
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{
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SetBitMask(TxControlReg, 0x03);
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}
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}
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void AntennaOff(void)
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{
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ClearBitMask(TxControlReg, 0x03);
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}
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void MFRC522_Reset(void)
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{
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Write_MFRC522(CommandReg, PCD_RESETPHASE);
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}
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void MFRC522_Init(void)
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{
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spi::init();
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NRSTPD_DDR |= (1<<NRSTPD_PIN);
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NRSTPD_PORT |= (1<<NRSTPD_PIN);
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MFRC522_Reset();
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//Timer: TPrescaler*TreloadVal/6.78MHz = 24ms
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Write_MFRC522(TModeReg, 0x8D); //Tauto=1; f(Timer) = 6.78MHz/TPreScaler
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Write_MFRC522(TPrescalerReg, 0x3E); //TModeReg[3..0] + TPrescalerReg
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Write_MFRC522(TReloadRegL, 30);
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Write_MFRC522(TReloadRegH, 0);
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Write_MFRC522(TxAutoReg, 0x40); //100%ASK
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Write_MFRC522(ModeReg, 0x3D); //CRC original value 0x6363 ???
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AntennaOn(); // open antenna
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}
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uchar MFRC522_Request(uchar reqMode, uchar *TagType)
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{
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uchar status;
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uint backBits; // bits of data received
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Write_MFRC522(BitFramingReg, 0x07); //TxLastBists = BitFramingReg[2..0] ???
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TagType[0] = reqMode;
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status = MFRC522_ToCard(PCD_TRANSCEIVE, TagType, 1, TagType, &backBits);
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if ((status != MI_OK) || (backBits != 0x10))
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{
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status = MI_ERR;
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}
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return status;
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}
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uchar MFRC522_ToCard(uchar command, uchar *sendData, uchar sendLen, uchar *backData, uint *backLen)
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{
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uchar status = MI_ERR;
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uchar irqEn = 0x00;
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uchar waitIRq = 0x00;
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uchar lastBits;
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uchar n;
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uint i;
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switch (command)
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{
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case PCD_AUTHENT: // card key authentication
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{
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irqEn = 0x12;
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waitIRq = 0x10;
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break;
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}
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case PCD_TRANSCEIVE: // send data in FIFO
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{
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irqEn = 0x77;
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waitIRq = 0x30;
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break;
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}
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default:
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break;
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}
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Write_MFRC522(CommIEnReg, irqEn|0x80); // permission for interrupt request
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ClearBitMask(CommIrqReg, 0x80); // clear all bits of the interrupt request
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SetBitMask(FIFOLevelReg, 0x80); //FlushBuffer=1, FIFO initialize
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Write_MFRC522(CommandReg, PCD_IDLE); //NO action; clear current command ???
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// write data into FIFO
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for (i=0; i<sendLen; i++)
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{
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Write_MFRC522(FIFODataReg, sendData[i]);
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}
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// execute command
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Write_MFRC522(CommandReg, command);
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if (command == PCD_TRANSCEIVE)
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{
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SetBitMask(BitFramingReg, 0x80); //StartSend=1,transmission of data starts
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}
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// wait for the completion of data transmission
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i = 2000; // adjust i according to clock frequency, max wait time for M1 card operation 25ms ???
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do
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{
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//CommIrqReg[7..0]
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//Set1 TxIRq RxIRq IdleIRq HiAlerIRq LoAlertIRq ErrIRq TimerIRq
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n = Read_MFRC522(CommIrqReg);
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i--;
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}
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while ((i!=0) && !(n&0x01) && !(n&waitIRq));
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ClearBitMask(BitFramingReg, 0x80); //StartSend=0
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if (i != 0)
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{
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if(!(Read_MFRC522(ErrorReg) & 0x1B)) //BufferOvfl Collerr CRCErr ProtecolErr
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{
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status = MI_OK;
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if (n & irqEn & 0x01)
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{
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status = MI_NOTAGERR; //??
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}
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if (command == PCD_TRANSCEIVE)
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{
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n = Read_MFRC522(FIFOLevelReg);
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lastBits = Read_MFRC522(ControlReg) & 0x07;
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if (lastBits)
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{
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*backLen = (n-1)*8 + lastBits;
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}
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else
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{
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*backLen = n*8;
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}
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if (n == 0)
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{
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n = 1;
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}
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if (n > MAX_LEN)
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||||
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{
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n = MAX_LEN;
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}
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// read the data received in FIFO
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||||
for (i=0; i<n; i++)
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||||
{
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backData[i] = Read_MFRC522(FIFODataReg);
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||||
}
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}
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||||
}
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||||
else
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||||
{
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||||
status = MI_ERR;
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}
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||||
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||||
}
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||||
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||||
//SetBitMask(ControlReg,0x80); //timer stops
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||||
//Write_MFRC522(CommandReg, PCD_IDLE);
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||||
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||||
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return status;
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||||
}
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||||
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||||
uchar MFRC522_Anticoll(uchar *serNum)
|
||||
{
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||||
uchar status;
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||||
uchar i;
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||||
uchar serNumCheck=0;
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||||
uint unLen;
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||||
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||||
Write_MFRC522(BitFramingReg, 0x00); //TxLastBists = BitFramingReg[2..0]
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||||
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serNum[0] = PICC_ANTICOLL;
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||||
serNum[1] = 0x20;
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||||
status = MFRC522_ToCard(PCD_TRANSCEIVE, serNum, 2, serNum, &unLen);
|
||||
|
||||
if (status == MI_OK)
|
||||
{
|
||||
// verify card sequence number
|
||||
for (i=0; i<4; i++)
|
||||
{
|
||||
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||||
serNumCheck ^= serNum[i];
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||||
}
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||||
if (serNumCheck != serNum[i])
|
||||
{
|
||||
status = MI_ERR;
|
||||
}
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||||
}
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||||
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||||
//SetBitMask(CollReg, 0x80); //ValuesAfterColl=1
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||||
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||||
return status;
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||||
}
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||||
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||||
void CalulateCRC(uchar *pIndata, uchar len, uchar *pOutData)
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||||
{
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||||
uchar i, n;
|
||||
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||||
ClearBitMask(DivIrqReg, 0x04); //CRCIrq = 0
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||||
SetBitMask(FIFOLevelReg, 0x80); // clear FIFO pointer
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||||
//Write_MFRC522(CommandReg, PCD_IDLE);
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||||
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||||
// write data into FIFO
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||||
for (i=0; i<len; i++)
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||||
{
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||||
Write_MFRC522(FIFODataReg, *(pIndata+i));
|
||||
}
|
||||
Write_MFRC522(CommandReg, PCD_CALCCRC);
|
||||
|
||||
// wait for completion of CRC calculation
|
||||
i = 0xFF;
|
||||
do
|
||||
{
|
||||
n = Read_MFRC522(DivIrqReg);
|
||||
i--;
|
||||
}
|
||||
while ((i!=0) && !(n&0x04)); //CRCIrq = 1
|
||||
|
||||
// read result from CRC calculation
|
||||
pOutData[0] = Read_MFRC522(CRCResultRegL);
|
||||
pOutData[1] = Read_MFRC522(CRCResultRegM);
|
||||
}
|
||||
|
||||
|
||||
uchar MFRC522_SelectTag(uchar *serNum)
|
||||
{
|
||||
uchar i;
|
||||
uchar status;
|
||||
uchar size;
|
||||
uint recvBits;
|
||||
uchar buffer[9];
|
||||
|
||||
//ClearBitMask(Status2Reg, 0x08); //MFCrypto1On=0
|
||||
|
||||
buffer[0] = PICC_SElECTTAG;
|
||||
buffer[1] = 0x70;
|
||||
for (i=0; i<5; i++)
|
||||
{
|
||||
buffer[i+2] = *(serNum+i);
|
||||
}
|
||||
CalulateCRC(buffer, 7, &buffer[7]); //??
|
||||
status = MFRC522_ToCard(PCD_TRANSCEIVE, buffer, 9, buffer, &recvBits);
|
||||
|
||||
if ((status == MI_OK) && (recvBits == 0x18))
|
||||
|
||||
{
|
||||
size = buffer[0];
|
||||
}
|
||||
else
|
||||
{
|
||||
size = 0;
|
||||
}
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
uchar MFRC522_Auth(uchar authMode, uchar BlockAddr, uchar *Sectorkey, uchar *serNum)
|
||||
{
|
||||
uchar status;
|
||||
uint recvBits;
|
||||
uchar i;
|
||||
uchar buff[12];
|
||||
|
||||
// Verification instructions + block address + sector password + card sequence number
|
||||
buff[0] = authMode;
|
||||
buff[1] = BlockAddr;
|
||||
for (i=0; i<6; i++)
|
||||
{
|
||||
buff[i+2] = *(Sectorkey+i);
|
||||
}
|
||||
for (i=0; i<4; i++)
|
||||
{
|
||||
buff[i+8] = *(serNum+i);
|
||||
}
|
||||
status = MFRC522_ToCard(PCD_AUTHENT, buff, 12, buff, &recvBits);
|
||||
|
||||
if ((status != MI_OK) || (!(Read_MFRC522(Status2Reg) & 0x08)))
|
||||
{
|
||||
status = MI_ERR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
uchar MFRC522_Read(uchar blockAddr, uchar *recvData)
|
||||
{
|
||||
|
||||
uchar status;
|
||||
uint unLen;
|
||||
|
||||
recvData[0] = PICC_READ;
|
||||
recvData[1] = blockAddr;
|
||||
CalulateCRC(recvData,2, &recvData[2]);
|
||||
status = MFRC522_ToCard(PCD_TRANSCEIVE, recvData, 4, recvData, &unLen);
|
||||
|
||||
if ((status != MI_OK) || (unLen != 0x90))
|
||||
{
|
||||
status = MI_ERR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
uchar MFRC522_Write(uchar blockAddr, uchar *writeData)
|
||||
{
|
||||
uchar status;
|
||||
uint recvBits;
|
||||
uchar i;
|
||||
uchar buff[18];
|
||||
|
||||
|
||||
buff[0] = PICC_WRITE;
|
||||
buff[1] = blockAddr;
|
||||
CalulateCRC(buff, 2, &buff[2]);
|
||||
status = MFRC522_ToCard(PCD_TRANSCEIVE, buff, 4, buff, &recvBits);
|
||||
|
||||
if ((status != MI_OK) || (recvBits != 4) || ((buff[0] & 0x0F) != 0x0A))
|
||||
{
|
||||
status = MI_ERR;
|
||||
}
|
||||
|
||||
if (status == MI_OK)
|
||||
{
|
||||
for (i=0; i<16; i++) // write 16Byte data into FIFO
|
||||
{
|
||||
buff[i] = *(writeData+i);
|
||||
}
|
||||
CalulateCRC(buff, 16, &buff[16]);
|
||||
status = MFRC522_ToCard(PCD_TRANSCEIVE, buff, 18, buff, &recvBits);
|
||||
|
||||
if ((status != MI_OK) || (recvBits != 4) || ((buff[0] & 0x0F) != 0x0A))
|
||||
{
|
||||
status = MI_ERR;
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
void MFRC522_Halt(void)
|
||||
{
|
||||
uchar status;
|
||||
uint unLen;
|
||||
uchar buff[4];
|
||||
|
||||
buff[0] = PICC_HALT;
|
||||
buff[1] = 0;
|
||||
CalulateCRC(buff, 2, &buff[2]);
|
||||
|
||||
status = MFRC522_ToCard(PCD_TRANSCEIVE, buff, 4, buff,&unLen);
|
||||
}
|
||||
|
|
@ -0,0 +1,135 @@
|
|||
#ifndef RC522_H
|
||||
#define RC522_H
|
||||
|
||||
#include <avr/io.h>
|
||||
|
||||
|
||||
//MF522command wordu
|
||||
#define PCD_IDLE 0x00 //NO action; cancel current command
|
||||
#define PCD_AUTHENT 0x0E //verify key
|
||||
#define PCD_RECEIVE 0x08 //receive data
|
||||
|
||||
#define PCD_TRANSMIT 0x04 //send data
|
||||
#define PCD_TRANSCEIVE 0x0C //receive and send data
|
||||
#define PCD_RESETPHASE 0x0F //reset
|
||||
#define PCD_CALCCRC 0x03 //CRC calculation
|
||||
|
||||
//Mifare_One Card command word
|
||||
#define PICC_REQIDL 0x26 // line-tracking area is dormant #define PICC_REQALL 0x52 //line-tracking area is interfered
|
||||
#define PICC_ANTICOLL 0x93 //Anti collision
|
||||
#define PICC_SElECTTAG 0x93 //choose cards
|
||||
#define PICC_AUTHENT1A 0x60 //Verify A key
|
||||
#define PICC_AUTHENT1B 0x61 //Verify B key
|
||||
#define PICC_READ 0x30 // Reader Module
|
||||
#define PICC_WRITE 0xA0 // letter block
|
||||
|
||||
#define PICC_DECREMENT 0xC0
|
||||
#define PICC_INCREMENT 0xC1
|
||||
#define PICC_RESTORE 0xC2 //Transfer data to buffer
|
||||
#define PICC_TRANSFER 0xB0 //Save buffer data
|
||||
#define PICC_HALT 0x50 //Dormancy
|
||||
|
||||
|
||||
//MF522 Error code returned when communication
|
||||
#define MI_OK 0
|
||||
#define MI_NOTAGERR 1
|
||||
#define MI_ERR 2
|
||||
|
||||
|
||||
//------------------MFRC522 Register---------------
|
||||
//Page 0:Command and Status
|
||||
#define Reserved00 0x00
|
||||
#define CommandReg 0x01
|
||||
#define CommIEnReg 0x02
|
||||
#define DivlEnReg 0x03
|
||||
#define CommIrqReg 0x04
|
||||
#define DivIrqReg 0x05
|
||||
#define ErrorReg 0x06
|
||||
#define Status1Reg 0x07
|
||||
#define Status2Reg 0x08
|
||||
#define FIFODataReg 0x09
|
||||
#define FIFOLevelReg 0x0A
|
||||
|
||||
#define WaterLevelReg 0x0B
|
||||
#define ControlReg 0x0C
|
||||
#define BitFramingReg 0x0D
|
||||
#define CollReg 0x0E
|
||||
#define Reserved01 0x0F
|
||||
//Page 1:Command
|
||||
#define Reserved10 0x10
|
||||
#define ModeReg 0x11
|
||||
#define TxModeReg 0x12
|
||||
#define RxModeReg 0x13
|
||||
#define TxControlReg 0x14
|
||||
#define TxAutoReg 0x15
|
||||
#define TxSelReg 0x16
|
||||
#define RxSelReg 0x17
|
||||
#define RxThresholdReg 0x18
|
||||
#define DemodReg 0x19
|
||||
|
||||
#define Reserved11 0x1A
|
||||
#define Reserved12 0x1B
|
||||
#define MifareReg 0x1C
|
||||
#define Reserved13 0x1D
|
||||
#define Reserved14 0x1E
|
||||
#define SerialSpeedReg 0x1F
|
||||
//Page 2:CFG
|
||||
#define Reserved20 0x20
|
||||
#define CRCResultRegM 0x21
|
||||
#define CRCResultRegL 0x22
|
||||
#define Reserved21 0x23
|
||||
#define ModWidthReg 0x24
|
||||
#define Reserved22 0x25
|
||||
#define RFCfgReg 0x26
|
||||
#define GsNReg 0x27
|
||||
#define CWGsPReg 0x28
|
||||
#define ModGsPReg 0x29
|
||||
#define TModeReg 0x2A
|
||||
#define TPrescalerReg 0x2B
|
||||
#define TReloadRegH 0x2C
|
||||
#define TReloadRegL 0x2D
|
||||
#define TCounterValueRegH 0x2E
|
||||
#define TCounterValueRegL 0x2F
|
||||
//Page 3:TestRegister
|
||||
#define Reserved30 0x30
|
||||
|
||||
#define TestSel1Reg 0x31
|
||||
#define TestSel2Reg 0x32
|
||||
#define TestPinEnReg 0x33
|
||||
#define TestPinValueReg 0x34
|
||||
#define TestBusReg 0x35
|
||||
#define AutoTestReg 0x36
|
||||
#define VersionReg 0x37
|
||||
#define AnalogTestReg 0x38
|
||||
#define TestDAC1Reg 0x39
|
||||
#define TestDAC2Reg 0x3A
|
||||
#define TestADCReg 0x3B
|
||||
#define Reserved31 0x3C
|
||||
#define Reserved32 0x3D
|
||||
#define Reserved33 0x3E
|
||||
#define Reserved34 0x3F
|
||||
|
||||
#define uchar unsigned char
|
||||
#define uint unsigned int
|
||||
|
||||
#ifndef NRSTPD_PORT
|
||||
#define NRSTPD_PORT PORTB
|
||||
#define NRSTPD_DDR DDRB
|
||||
#define NRSTPD_PIN PB1
|
||||
#endif
|
||||
|
||||
#define MAX_LEN 16
|
||||
|
||||
void MFRC522_Init(void);
|
||||
void MFRC522_Halt(void);
|
||||
uchar MFRC522_ToCard(uchar command, uchar *sendData, uchar sendLen, uchar *backData, uint *backLen);
|
||||
void Write_MFRC522(uchar addr, uchar val);
|
||||
uchar Read_MFRC522(uchar addr);
|
||||
uchar MFRC522_Auth(uchar authMode, uchar BlockAddr, uchar *Sectorkey, uchar *serNum);
|
||||
uchar MFRC522_Write(uchar blockAddr, uchar *writeData);
|
||||
uchar MFRC522_Read(uchar blockAddr, uchar *recvData);
|
||||
uchar MFRC522_Request(uchar reqMode, uchar *TagType);
|
||||
uchar MFRC522_Anticoll(uchar *serNum);
|
||||
uchar MFRC522_SelectTag(uchar *serNum);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
#include "spi.h"
|
||||
|
||||
|
||||
namespace spi
|
||||
{
|
||||
void init() {
|
||||
SPI_PORT |= (1<<SPI_CS); //set chip select pin high
|
||||
SPI_DDR |= (1<<SPI_SCK)|(1<<SPI_MOSI)|(1<<SPI_CS); // spi sck mosi and chip select outputs
|
||||
|
||||
SPCR |= (1<<SPE)|(1<<MSTR)|(1<<SPR0); //enable SPI , Master, fck/16
|
||||
}
|
||||
|
||||
uint8_t transfer(uint8_t data) {
|
||||
SPDR = data;
|
||||
while(!(SPSR & (1<<SPIF))); //wait for transmition to complete
|
||||
return SPDR;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
#pragma once
|
||||
|
||||
#include <avr/io.h>
|
||||
|
||||
|
||||
#if defined __AVR_ATmega328P__
|
||||
#define SPI_DDR DDRB
|
||||
#define SPI_PORT PORTB
|
||||
#define SPI_SCK PB5
|
||||
#define SPI_MISO PB4
|
||||
#define SPI_MOSI PB3
|
||||
#define SPI_CS PB2
|
||||
#elif defined __AVR_ATmega32__ || defined __AVR_ATmega16__
|
||||
#define SPI_PORT PORTB
|
||||
#define SPI_DDR DDRB
|
||||
#define SPI_SCK PB7
|
||||
#define SPI_MOSI PB5
|
||||
#define SPI_CS PB4
|
||||
#endif
|
||||
|
||||
namespace spi
|
||||
{
|
||||
void init();
|
||||
uint8_t transfer(uint8_t data);
|
||||
|
||||
inline void cs_low() {SPI_PORT &= ~(1<<SPI_CS);}
|
||||
|
||||
inline void cs_high() {SPI_PORT |= (1<<SPI_CS);}
|
||||
} // namespace spi
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,106 @@
|
|||
#include "../src/rc522.h"
|
||||
#include <avr/io.h>
|
||||
#include "../lib/usart/src/usart.h"
|
||||
#include "string.h"
|
||||
|
||||
#define uchar unsigned char
|
||||
#define uint unsigned int
|
||||
#define MAX_LEN 16
|
||||
const int chipSelectPin = 10;
|
||||
const int NRSTPD = 5;
|
||||
|
||||
uchar serNum[5];
|
||||
uchar writeDate[16] ={'T', 'e', 'n', 'g', ' ', 'B', 'o', 0, 0, 0, 0, 0, 0, 0, 0,0};
|
||||
|
||||
uchar sectorKeyA[16][16] = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},
|
||||
};
|
||||
uchar sectorNewKeyA[16][16] = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xff,0x07,0x80,0x69, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},
|
||||
{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xff,0x07,0x80,0x69, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},
|
||||
};
|
||||
|
||||
int main() {
|
||||
usart::init(1000000);
|
||||
printf("Hello");
|
||||
MFRC522_Init();
|
||||
while(1) {
|
||||
uchar i;
|
||||
uchar status;
|
||||
uchar str[MAX_LEN];
|
||||
uchar RC_size;
|
||||
uchar blockAddr; //Select the address of the operation 0～63
|
||||
|
||||
|
||||
// searching card, return card type
|
||||
status = MFRC522_Request(PICC_REQIDL, str);
|
||||
if (status == MI_OK)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
status = MFRC522_Anticoll(str);
|
||||
memcpy(serNum, str, 5);
|
||||
if (status == MI_OK)
|
||||
{
|
||||
printf("The card's number is : %x%x%x%x%x%x\n\r",
|
||||
serNum[0],
|
||||
serNum[1],
|
||||
serNum[2],
|
||||
serNum[3],
|
||||
serNum[4]);
|
||||
}
|
||||
|
||||
// select card, return card capacity
|
||||
RC_size = MFRC522_SelectTag(serNum);
|
||||
if (RC_size != 0)
|
||||
{}
|
||||
|
||||
// write data card
|
||||
blockAddr = 7; // data block 7
|
||||
status = MFRC522_Auth(PICC_AUTHENT1A, blockAddr, sectorKeyA[blockAddr/4], serNum); // authentication
|
||||
if (status == MI_OK)
|
||||
|
||||
{
|
||||
// write data
|
||||
status = MFRC522_Write(blockAddr, sectorNewKeyA[blockAddr/4]);
|
||||
printf("set the new card password, and can modify the data of the Sector: ");
|
||||
printf("%i", blockAddr/4);
|
||||
|
||||
// write data
|
||||
blockAddr = blockAddr - 3 ;
|
||||
status = MFRC522_Write(blockAddr, writeDate);
|
||||
if(status == MI_OK)
|
||||
{
|
||||
printf("OK!\n\r");
|
||||
}
|
||||
}
|
||||
|
||||
// read card
|
||||
blockAddr = 7; // data block 7
|
||||
status = MFRC522_Auth(PICC_AUTHENT1A, blockAddr,
|
||||
|
||||
sectorNewKeyA[blockAddr/4], serNum); // authentication
|
||||
if (status == MI_OK)
|
||||
{
|
||||
// read data
|
||||
blockAddr = blockAddr - 3 ;
|
||||
status = MFRC522_Read(blockAddr, str);
|
||||
if (status == MI_OK)
|
||||
{
|
||||
printf("Read from the card ,the data is : \n\r");
|
||||
for (i=0; i<16; i++)
|
||||
{
|
||||
printf("%c", str[i]);
|
||||
}
|
||||
printf("\n\r");
|
||||
}
|
||||
}
|
||||
printf("\n\r");
|
||||
MFRC522_Halt(); // command card into sleeping mode
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue