64 lines
2.6 KiB
Python
64 lines
2.6 KiB
Python
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import uctypes
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from uctypes import BF_POS, BF_LEN, BFUINT32
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DMA_CTRL_REG = {
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"AHB_ERROR": 31 << BF_POS | 1 << BF_LEN | BFUINT32,
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"READ_ERR": 30 << BF_POS | 1 << BF_LEN | BFUINT32,
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"WRITE_ERR": 29 << BF_POS | 1 << BF_LEN | BFUINT32,
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"Reserved": 25 << BF_POS | 4 << BF_LEN | BFUINT32,
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"BUSY": 24 << BF_POS | 1 << BF_LEN | BFUINT32,
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"SNIFF_EN": 23 << BF_POS | 1 << BF_LEN | BFUINT32,
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"BSWAP": 22 << BF_POS | 1 << BF_LEN | BFUINT32,
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"IRQ_QUIET": 21 << BF_POS | 1 << BF_LEN | BFUINT32,
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"TREQ_SEL": 15 << BF_POS | 6 << BF_LEN | BFUINT32,
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"CHAIN_TO": 11 << BF_POS | 4 << BF_LEN | BFUINT32,
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"RING_SEL": 10 << BF_POS | 1 << BF_LEN | BFUINT32,
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"RING_SIZE": 6 << BF_POS | 4 << BF_LEN | BFUINT32,
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"INCR_WRITE": 5 << BF_POS | 1 << BF_LEN | BFUINT32,
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"INCR_READ": 4 << BF_POS | 1 << BF_LEN | BFUINT32,
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"DATA_SIZE": 2 << BF_POS | 2 << BF_LEN | BFUINT32,
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"HIGH_PRIO": 1 << BF_POS | 1 << BF_LEN | BFUINT32,
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"EN": 0 << BF_POS | 1 << BF_LEN | BFUINT32,
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}
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DMA_LAYOUT = {
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"READ_ADDR": 0 | uctypes.UINT32,
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"WRITE_ADDR": 4 | uctypes.UINT32,
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"TRANS_COUNT": 8 | uctypes.UINT32,
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"CTRL_TRIG": (12, DMA_CTRL_REG),
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"CTRL_TRIG_RAW": 12 | uctypes.UINT32, # for single update of all fields
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"AL1_CTRL": 16 | uctypes.UINT32,
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}
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# create the DMA channel structs (0-11)
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CHANNELS = [uctypes.struct(0x50000000 + i * 0x40, DMA_LAYOUT) for i in range(0,12)]
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# init dma channels to some default values
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def init_channels():
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for i, ch in enumerate(CHANNELS):
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# no wraparound, sniff=0, swap_byte=0, irq_quiet=1
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# unpaced transfers (=0x3f). high prio=0, data_size=word, incr_r/w = true
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ch.CTRL_TRIG_RAW = 0x3f8030
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# set chain to itself, to disable chaining
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ch.CTRL_TRIG.CHAIN_TO = i
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# example function to show mem->mem transfer
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# dest, src can be bytearrays, size in bytes
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def memcopy(ch, dest, src, size, enable=1):
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ch.CTRL_TRIG.EN = 0
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ch.WRITE_ADDR = uctypes.addressof(dest)
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ch.READ_ADDR = uctypes.addressof(src)
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ch.TRANS_COUNT = size // (1 << ch.CTRL_TRIG.DATA_SIZE)
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ch.CTRL_TRIG.EN = enable
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# can be used to temporary construct the necessary DMA CTRL values
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# then copy over to actual dma channel's CTRL value in one write
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# e.g.
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# scratch.CHAIN_TO=2;
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# scratch.DATA_SIZE=2;
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# ...
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# CH0.CTRL_TRIG_RAW=scratch.CTRL_TRIG_RAW
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tmp = bytearray(uctypes.sizeof(DMA_LAYOUT))
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scratch_ctrl = uctypes.struct(uctypes.addressof(tmp), DMA_CTRL_REG)
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