1026 lines
31 KiB
C
1026 lines
31 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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/* ************************************************************
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* include files
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* ************************************************************ */
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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#define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
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#define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm))
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#if (PHYDM_TESTCHIP_SUPPORT == 1)
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#define READ_AND_CONFIG(ic, txt) do {\
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if (dm->is_mp_chip)\
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READ_AND_CONFIG_MP(ic, txt);\
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else\
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READ_AND_CONFIG_TC(ic, txt);\
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} while (0)
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#else
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#define READ_AND_CONFIG READ_AND_CONFIG_MP
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#endif
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#define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
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#define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
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#if (PHYDM_TESTCHIP_SUPPORT == 1)
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#define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
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#else
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#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
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#endif
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enum hal_status
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odm_config_rf_with_header_file(
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struct dm_struct *dm,
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enum odm_rf_config_type config_type,
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u8 e_rf_path
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)
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{
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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void *adapter = dm->adapter;
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PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
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#endif
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enum hal_status result = HAL_STATUS_SUCCESS;
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PHYDM_DBG(dm, ODM_COMP_INIT,
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"===>odm_config_rf_with_header_file (%s)\n", (dm->is_mp_chip) ? "MPChip" : "TestChip");
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PHYDM_DBG(dm, ODM_COMP_INIT,
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"support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
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dm->support_platform, dm->support_interface, dm->board_type);
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/* 1 AP doesn't use PHYDM power tracking table in these ICs */
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#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
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#if (RTL8812A_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8812) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8812a, _radioa);
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else if (e_rf_path == RF_PATH_B)
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READ_AND_CONFIG_MP(8812a, _radiob);
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} else if (config_type == CONFIG_RF_TXPWR_LMT) {
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
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if ((hal_data->EEPROMSVID == 0x17AA && hal_data->EEPROMSMID == 0xA811) ||
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(hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0xA812) ||
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(hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0x8812))
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READ_AND_CONFIG_MP(8812a, _txpwr_lmt_hm812a03);
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else
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#endif
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READ_AND_CONFIG_MP(8812a, _txpwr_lmt);
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}
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}
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#endif
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#if (RTL8821A_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8821) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8821a, _radioa);
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} else if (config_type == CONFIG_RF_TXPWR_LMT) {
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if (dm->support_interface == ODM_ITRF_USB) {
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if (dm->ext_pa_5g || dm->ext_lna_5g)
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READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_fem);
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else
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READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_ipa);
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} else {
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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if (mgnt_info->CustomerID == RT_CID_8821AE_ASUS_MB)
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READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_8mm);
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else if (mgnt_info->CustomerID == RT_CID_ASUS_NB)
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READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_5mm);
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else
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#endif
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READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a);
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}
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}
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}
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#endif
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#if (RTL8192E_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8192E) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8192e, _radioa);
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else if (e_rf_path == RF_PATH_B)
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READ_AND_CONFIG_MP(8192e, _radiob);
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} else if (config_type == CONFIG_RF_TXPWR_LMT) {
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
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if ((hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8192) ||
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(hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8193))
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READ_AND_CONFIG_MP(8192e, _txpwr_lmt_8192e_sar_5mm);
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else
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#endif
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READ_AND_CONFIG_MP(8192e, _txpwr_lmt);
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}
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}
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#endif
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#if (RTL8723D_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8723D) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8723d, _radioa);
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} else if (config_type == CONFIG_RF_TXPWR_LMT)
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READ_AND_CONFIG_MP(8723d, _txpwr_lmt);
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}
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#endif
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/* JJ ADD 20161014 */
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#if (RTL8710B_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8710B) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8710b, _radioa);
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} else if (config_type == CONFIG_RF_TXPWR_LMT)
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READ_AND_CONFIG_MP(8710b, _txpwr_lmt);
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}
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#endif
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#endif/* (DM_ODM_SUPPORT_TYPE != ODM_AP) */
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/* 1 All platforms support */
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#if (RTL8188E_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8188E) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8188e, _radioa);
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} else if (config_type == CONFIG_RF_TXPWR_LMT)
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READ_AND_CONFIG_MP(8188e, _txpwr_lmt);
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}
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#endif
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#if (RTL8723B_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8723B) {
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if (config_type == CONFIG_RF_RADIO)
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READ_AND_CONFIG_MP(8723b, _radioa);
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else if (config_type == CONFIG_RF_TXPWR_LMT)
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READ_AND_CONFIG_MP(8723b, _txpwr_lmt);
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}
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#endif
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#if (RTL8814A_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8814A) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8814a, _radioa);
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else if (e_rf_path == RF_PATH_B)
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READ_AND_CONFIG_MP(8814a, _radiob);
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else if (e_rf_path == RF_PATH_C)
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READ_AND_CONFIG_MP(8814a, _radioc);
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else if (e_rf_path == RF_PATH_D)
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READ_AND_CONFIG_MP(8814a, _radiod);
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} else if (config_type == CONFIG_RF_TXPWR_LMT) {
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if (dm->rfe_type == 0)
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READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type0);
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else if (dm->rfe_type == 1)
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READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type1);
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else if (dm->rfe_type == 2)
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READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type2);
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else if (dm->rfe_type == 3)
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READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type3);
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else if (dm->rfe_type == 5)
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READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type5);
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else if (dm->rfe_type == 7)
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READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type7);
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else if (dm->rfe_type == 8)
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READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type8);
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else
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READ_AND_CONFIG_MP(8814a,_txpwr_lmt);
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}
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}
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#endif
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#if (RTL8703B_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8703B) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8703b, _radioa);
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}
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}
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#endif
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#if (RTL8188F_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8188F) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8188f, _radioa);
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} else if (config_type == CONFIG_RF_TXPWR_LMT)
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READ_AND_CONFIG_MP(8188f, _txpwr_lmt);
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}
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#endif
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#if (RTL8822B_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8822B) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8822b, _radioa);
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else if (e_rf_path == RF_PATH_B)
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READ_AND_CONFIG_MP(8822b, _radiob);
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} else if (config_type == CONFIG_RF_TXPWR_LMT) {
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if (dm->rfe_type == 5)
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READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type5);
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else if (dm->rfe_type == 2)
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READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type2);
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else if (dm->rfe_type == 3)
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READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type3);
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else if (dm->rfe_type == 4)
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READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type4);
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else if (dm->rfe_type == 12)
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READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type12);
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else if (dm->rfe_type == 15)
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READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type15);
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else if (dm->rfe_type == 16)
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READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type16);
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else if (dm->rfe_type == 17)
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READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type17);
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else
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READ_AND_CONFIG_MP(8822b, _txpwr_lmt);
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}
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}
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#endif
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#if (RTL8197F_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8197F) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG_MP(8197f, _radioa);
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else if (e_rf_path == RF_PATH_B)
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READ_AND_CONFIG_MP(8197f, _radiob);
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}
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}
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#endif
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#if (RTL8821C_SUPPORT == 1)
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if (dm->support_ic_type == ODM_RTL8821C) {
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if (config_type == CONFIG_RF_RADIO) {
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if (e_rf_path == RF_PATH_A)
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READ_AND_CONFIG(8821c, _radioa);
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} else if (config_type == CONFIG_RF_TXPWR_LMT)
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READ_AND_CONFIG(8821c, _txpwr_lmt);
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}
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#endif
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if (config_type == CONFIG_RF_RADIO) {
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if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
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result = phydm_set_reg_by_fw(dm,
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PHYDM_HALMAC_CMD_END,
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0,
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0,
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0,
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(enum rf_path)0,
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0);
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PHYDM_DBG(dm, ODM_COMP_INIT,
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"rf param offload end!result = %d", result);
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}
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}
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return result;
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}
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enum hal_status
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odm_config_rf_with_tx_pwr_track_header_file(
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struct dm_struct *dm
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)
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{
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PHYDM_DBG(dm, ODM_COMP_INIT,
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"===>odm_config_rf_with_tx_pwr_track_header_file (%s)\n", (dm->is_mp_chip) ? "MPChip" : "TestChip");
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PHYDM_DBG(dm, ODM_COMP_INIT,
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"support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
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dm->support_platform, dm->support_interface, dm->board_type);
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/* 1 AP doesn't use PHYDM power tracking table in these ICs */
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#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
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#if RTL8821A_SUPPORT
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if (dm->support_ic_type == ODM_RTL8821) {
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if (dm->support_interface == ODM_ITRF_PCIE)
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READ_AND_CONFIG_MP(8821a, _txpowertrack_pcie);
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else if (dm->support_interface == ODM_ITRF_USB)
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READ_AND_CONFIG_MP(8821a, _txpowertrack_usb);
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else if (dm->support_interface == ODM_ITRF_SDIO)
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READ_AND_CONFIG_MP(8821a, _txpowertrack_sdio);
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}
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#endif
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#if RTL8812A_SUPPORT
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if (dm->support_ic_type == ODM_RTL8812) {
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if (dm->support_interface == ODM_ITRF_PCIE)
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READ_AND_CONFIG_MP(8812a, _txpowertrack_pcie);
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else if (dm->support_interface == ODM_ITRF_USB) {
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if (dm->rfe_type == 3 && dm->is_mp_chip)
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READ_AND_CONFIG_MP(8812a, _txpowertrack_rfe3);
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else
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READ_AND_CONFIG_MP(8812a, _txpowertrack_usb);
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}
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}
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#endif
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#if RTL8192E_SUPPORT
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if (dm->support_ic_type == ODM_RTL8192E) {
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if (dm->support_interface == ODM_ITRF_PCIE)
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READ_AND_CONFIG_MP(8192e, _txpowertrack_pcie);
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else if (dm->support_interface == ODM_ITRF_USB)
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READ_AND_CONFIG_MP(8192e, _txpowertrack_usb);
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else if (dm->support_interface == ODM_ITRF_SDIO)
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READ_AND_CONFIG_MP(8192e, _txpowertrack_sdio);
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}
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#endif
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#if RTL8723D_SUPPORT
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if (dm->support_ic_type == ODM_RTL8723D) {
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if (dm->support_interface == ODM_ITRF_PCIE)
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READ_AND_CONFIG_MP(8723d, _txpowertrack_pcie);
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else if (dm->support_interface == ODM_ITRF_USB)
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READ_AND_CONFIG_MP(8723d, _txpowertrack_usb);
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else if (dm->support_interface == ODM_ITRF_SDIO)
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READ_AND_CONFIG_MP(8723d, _txpowertrack_sdio);
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READ_AND_CONFIG_MP(8723d, _txxtaltrack);
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}
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#endif
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/* JJ ADD 20161014 */
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#if RTL8710B_SUPPORT
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if (dm->support_ic_type == ODM_RTL8710B) {
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if (dm->package_type == 1)
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READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_smic);
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else if (dm->package_type == 5)
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READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_umc);
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READ_AND_CONFIG_MP(8710b, _txxtaltrack);
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}
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#endif
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#if RTL8188E_SUPPORT
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if (dm->support_ic_type == ODM_RTL8188E) {
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if (odm_get_mac_reg(dm, 0xF0, 0xF000) >= 8) { /*if 0xF0[15:12] >= 8, SMIC*/
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if (dm->support_interface == ODM_ITRF_PCIE)
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READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie_icut);
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else if (dm->support_interface == ODM_ITRF_USB)
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READ_AND_CONFIG_MP(8188e, _txpowertrack_usb_icut);
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else if (dm->support_interface == ODM_ITRF_SDIO)
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READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio_icut);
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} else { /*else 0xF0[15:12] < 8, TSMC*/
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if (dm->support_interface == ODM_ITRF_PCIE)
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READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie);
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else if (dm->support_interface == ODM_ITRF_USB)
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READ_AND_CONFIG_MP(8188e, _txpowertrack_usb);
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else if (dm->support_interface == ODM_ITRF_SDIO)
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READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio);
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}
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}
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#endif
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#endif/* (DM_ODM_SUPPORT_TYPE != ODM_AP) */
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/* 1 All platforms support */
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#if RTL8723B_SUPPORT
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if (dm->support_ic_type == ODM_RTL8723B) {
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if (dm->support_interface == ODM_ITRF_PCIE)
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READ_AND_CONFIG_MP(8723b, _txpowertrack_pcie);
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else if (dm->support_interface == ODM_ITRF_USB)
|
|
READ_AND_CONFIG_MP(8723b, _txpowertrack_usb);
|
|
else if (dm->support_interface == ODM_ITRF_SDIO)
|
|
READ_AND_CONFIG_MP(8723b, _txpowertrack_sdio);
|
|
}
|
|
#endif
|
|
#if RTL8814A_SUPPORT
|
|
if (dm->support_ic_type == ODM_RTL8814A) {
|
|
if (dm->rfe_type == 0)
|
|
READ_AND_CONFIG_MP(8814a, _txpowertrack_type0);
|
|
else if (dm->rfe_type == 2)
|
|
READ_AND_CONFIG_MP(8814a, _txpowertrack_type2);
|
|
else if (dm->rfe_type == 5)
|
|
READ_AND_CONFIG_MP(8814a, _txpowertrack_type5);
|
|
else if (dm->rfe_type == 7)
|
|
READ_AND_CONFIG_MP(8814a, _txpowertrack_type7);
|
|
else if (dm->rfe_type == 8)
|
|
READ_AND_CONFIG_MP(8814a, _txpowertrack_type8);
|
|
else
|
|
READ_AND_CONFIG_MP(8814a, _txpowertrack);
|
|
|
|
READ_AND_CONFIG_MP(8814a, _txpowertssi);
|
|
}
|
|
#endif
|
|
#if RTL8703B_SUPPORT
|
|
if (dm->support_ic_type == ODM_RTL8703B) {
|
|
if (dm->support_interface == ODM_ITRF_USB)
|
|
READ_AND_CONFIG_MP(8703b, _txpowertrack_usb);
|
|
else if (dm->support_interface == ODM_ITRF_SDIO)
|
|
READ_AND_CONFIG_MP(8703b, _txpowertrack_sdio);
|
|
|
|
READ_AND_CONFIG_MP(8703b, _txxtaltrack);
|
|
}
|
|
#endif
|
|
|
|
#if RTL8188F_SUPPORT
|
|
if (dm->support_ic_type == ODM_RTL8188F) {
|
|
if (dm->support_interface == ODM_ITRF_USB)
|
|
READ_AND_CONFIG_MP(8188f, _txpowertrack_usb);
|
|
else if (dm->support_interface == ODM_ITRF_SDIO)
|
|
READ_AND_CONFIG_MP(8188f, _txpowertrack_sdio);
|
|
}
|
|
#endif
|
|
|
|
#if RTL8822B_SUPPORT
|
|
if (dm->support_ic_type == ODM_RTL8822B) {
|
|
if (dm->rfe_type == 0)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type0);
|
|
else if (dm->rfe_type == 1)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type1);
|
|
else if (dm->rfe_type == 2)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type2);
|
|
else if ((dm->rfe_type == 3) || (dm->rfe_type == 5))
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5);
|
|
else if (dm->rfe_type == 4)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type4);
|
|
else if (dm->rfe_type == 6)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type6);
|
|
else if (dm->rfe_type == 7)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type7);
|
|
else if (dm->rfe_type == 8)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type8);
|
|
else if (dm->rfe_type == 9)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type9);
|
|
else if (dm->rfe_type == 10)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type10);
|
|
else if (dm->rfe_type == 11)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type11);
|
|
else if (dm->rfe_type == 12)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type12);
|
|
else if (dm->rfe_type == 13)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type13);
|
|
else if (dm->rfe_type == 14)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type14);
|
|
else if (dm->rfe_type == 15)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type15);
|
|
else if (dm->rfe_type == 16)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type16);
|
|
else if (dm->rfe_type == 17)
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack_type17);
|
|
else
|
|
READ_AND_CONFIG_MP(8822b, _txpowertrack);
|
|
}
|
|
#endif
|
|
|
|
#if RTL8197F_SUPPORT
|
|
if (dm->support_ic_type == ODM_RTL8197F) {
|
|
if (dm->rfe_type == 0)
|
|
READ_AND_CONFIG_MP(8197f, _txpowertrack_type0);
|
|
else if (dm->rfe_type == 1)
|
|
READ_AND_CONFIG_MP(8197f, _txpowertrack_type1);
|
|
else
|
|
READ_AND_CONFIG_MP(8197f, _txpowertrack);
|
|
}
|
|
#endif
|
|
|
|
#if RTL8821C_SUPPORT
|
|
if (dm->support_ic_type == ODM_RTL8821C) {
|
|
if (dm->rfe_type == 0x5)
|
|
READ_AND_CONFIG(8821c, _txpowertrack_type0x28);
|
|
else if (dm->rfe_type == 0x4)
|
|
READ_AND_CONFIG(8821c, _txpowertrack_type0x20);
|
|
else
|
|
READ_AND_CONFIG(8821c, _txpowertrack);
|
|
}
|
|
#endif
|
|
|
|
return HAL_STATUS_SUCCESS;
|
|
}
|
|
|
|
enum hal_status
|
|
odm_config_bb_with_header_file(
|
|
struct dm_struct *dm,
|
|
enum odm_bb_config_type config_type
|
|
)
|
|
{
|
|
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
|
void *adapter = dm->adapter;
|
|
PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
|
|
#endif
|
|
enum hal_status result = HAL_STATUS_SUCCESS;
|
|
|
|
/* 1 AP doesn't use PHYDM initialization in these ICs */
|
|
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
|
|
#if (RTL8812A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8812) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8812a, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8812a, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG) {
|
|
if (dm->rfe_type == 3 && dm->is_mp_chip)
|
|
READ_AND_CONFIG_MP(8812a, _phy_reg_pg_asus);
|
|
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
|
else if (mgnt_info->CustomerID == RT_CID_WNC_NEC && dm->is_mp_chip)
|
|
READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec);
|
|
#if RT_PLATFORM == PLATFORM_MACOSX
|
|
/*{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/
|
|
else if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO)
|
|
READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni);
|
|
/* TP-Link T4UH, Isaiah 2015-03-16*/
|
|
else if (mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) {
|
|
pr_debug("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n");
|
|
READ_AND_CONFIG_MP(8812a, _phy_reg_pg_tplink);
|
|
}
|
|
#endif
|
|
#endif
|
|
else
|
|
READ_AND_CONFIG_MP(8812a, _phy_reg_pg);
|
|
} else if (config_type == CONFIG_BB_PHY_REG_MP)
|
|
READ_AND_CONFIG_MP(8812a, _phy_reg_mp);
|
|
else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
|
|
dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
|
|
/*AGC_TAB DIFF dont support FW offload*/
|
|
if ((*dm->channel >= 36) && (*dm->channel <= 64))
|
|
AGC_DIFF_CONFIG_MP(8812a, lb);
|
|
else if (*dm->channel >= 100)
|
|
AGC_DIFF_CONFIG_MP(8812a, hb);
|
|
}
|
|
}
|
|
#endif
|
|
#if (RTL8821A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8821a, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8821a, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG) {
|
|
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
|
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
|
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
|
|
|
|
if ((hal_data->EEPROMSVID == 0x1043 && hal_data->EEPROMSMID == 0x207F))
|
|
READ_AND_CONFIG_MP(8821a, _phy_reg_pg_e202_sa);
|
|
else
|
|
#endif
|
|
#if (RT_PLATFORM == PLATFORM_MACOSX)
|
|
/*{1827}{1022} for BUFFALO power by rate table. Isaiah 2013-10-18*/
|
|
if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) {
|
|
/*{1024} for BUFFALO power by rate table. (JP/US)*/
|
|
if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G)
|
|
READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us);
|
|
else
|
|
READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp);
|
|
} else
|
|
#endif
|
|
#endif
|
|
READ_AND_CONFIG_MP(8821a, _phy_reg_pg);
|
|
}
|
|
}
|
|
#endif
|
|
#if (RTL8192E_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8192E) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8192e, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8192e, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG)
|
|
READ_AND_CONFIG_MP(8192e, _phy_reg_pg);
|
|
}
|
|
#endif
|
|
#if (RTL8723D_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8723D) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8723d, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8723d, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG)
|
|
READ_AND_CONFIG_MP(8723d, _phy_reg_pg);
|
|
}
|
|
#endif
|
|
/* JJ ADD 20161014 */
|
|
#if (RTL8710B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8710B) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8710b, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8710b, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG)
|
|
READ_AND_CONFIG_MP(8710b, _phy_reg_pg);
|
|
}
|
|
#endif
|
|
|
|
#endif/* (DM_ODM_SUPPORT_TYPE != ODM_AP) */
|
|
|
|
|
|
/* 1 All platforms support */
|
|
#if (RTL8188E_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8188E) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8188e, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8188e, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG)
|
|
READ_AND_CONFIG_MP(8188e, _phy_reg_pg);
|
|
}
|
|
#endif
|
|
#if (RTL8723B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8723B) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8723b, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8723b, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG)
|
|
READ_AND_CONFIG_MP(8723b, _phy_reg_pg);
|
|
}
|
|
#endif
|
|
#if (RTL8814A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8814A) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8814a, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8814a, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG) {
|
|
if (dm->rfe_type == 0)
|
|
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type0);
|
|
else if (dm->rfe_type == 2)
|
|
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type2);
|
|
else if (dm->rfe_type == 3)
|
|
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type3);
|
|
else if (dm->rfe_type == 4)
|
|
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type4);
|
|
else if (dm->rfe_type == 5)
|
|
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type5);
|
|
else if (dm->rfe_type == 7)
|
|
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type7);
|
|
else if (dm->rfe_type == 8)
|
|
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type8);
|
|
else
|
|
READ_AND_CONFIG_MP(8814a,_phy_reg_pg);
|
|
}
|
|
else if (config_type == CONFIG_BB_PHY_REG_MP)
|
|
READ_AND_CONFIG_MP(8814a, _phy_reg_mp);
|
|
}
|
|
#endif
|
|
#if (RTL8703B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8703B) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8703b, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8703b, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG)
|
|
READ_AND_CONFIG_MP(8703b, _phy_reg_pg);
|
|
}
|
|
#endif
|
|
#if (RTL8188F_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8188F) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8188f, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8188f, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG)
|
|
READ_AND_CONFIG_MP(8188f, _phy_reg_pg);
|
|
}
|
|
#endif
|
|
#if (RTL8822B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8822B) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8822b, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG) {
|
|
if (dm->rfe_type == 2)
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type2);
|
|
else if (dm->rfe_type == 3)
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type3);
|
|
else if (dm->rfe_type == 4)
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type4);
|
|
else if (dm->rfe_type == 5)
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type5);
|
|
else if (dm->rfe_type == 12)
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type12);
|
|
else if (dm->rfe_type == 15)
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type15);
|
|
else if (dm->rfe_type == 16)
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type16);
|
|
else if (dm->rfe_type == 17)
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type17);
|
|
else
|
|
READ_AND_CONFIG_MP(8822b, _phy_reg_pg);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
#if (RTL8197F_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8197F) {
|
|
if (config_type == CONFIG_BB_PHY_REG) {
|
|
READ_AND_CONFIG_MP(8197f, _phy_reg);
|
|
if (dm->cut_version == ODM_CUT_A)
|
|
phydm_phypara_a_cut(dm);
|
|
} else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG_MP(8197f, _agc_tab);
|
|
}
|
|
#endif
|
|
|
|
#if (RTL8821C_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821C) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG(8821c, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB) {
|
|
READ_AND_CONFIG(8821c, _agc_tab);
|
|
/* According to RFEtype, choosing correct AGC table*/
|
|
if (dm->default_rf_set_8821c == SWITCH_TO_BTG)
|
|
AGC_DIFF_CONFIG_MP(8821c, btg);
|
|
} else if (config_type == CONFIG_BB_PHY_REG_PG) {
|
|
if (dm->rfe_type == 0x5)
|
|
READ_AND_CONFIG(8821c, _phy_reg_pg_type0x28);
|
|
else
|
|
READ_AND_CONFIG(8821c, _phy_reg_pg);
|
|
} else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
|
|
dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
|
|
/*AGC_TAB DIFF dont support FW offload*/
|
|
if (dm->current_rf_set_8821c == SWITCH_TO_BTG)
|
|
AGC_DIFF_CONFIG_MP(8821c, btg);
|
|
else if (dm->current_rf_set_8821c == SWITCH_TO_WLG)
|
|
AGC_DIFF_CONFIG_MP(8821c, wlg);
|
|
} else if (config_type == CONFIG_BB_PHY_REG_MP)
|
|
READ_AND_CONFIG(8821c, _phy_reg_mp);
|
|
}
|
|
#endif
|
|
|
|
#if (RTL8195A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8195A) {
|
|
if (config_type == CONFIG_BB_PHY_REG)
|
|
READ_AND_CONFIG(8195a, _phy_reg);
|
|
else if (config_type == CONFIG_BB_AGC_TAB)
|
|
READ_AND_CONFIG(8195a, _agc_tab);
|
|
else if (config_type == CONFIG_BB_PHY_REG_PG)
|
|
READ_AND_CONFIG(8195a, _phy_reg_pg);
|
|
}
|
|
#endif
|
|
|
|
if (config_type == CONFIG_BB_PHY_REG || config_type == CONFIG_BB_AGC_TAB)
|
|
if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
|
|
result = phydm_set_reg_by_fw(dm,
|
|
PHYDM_HALMAC_CMD_END,
|
|
0,
|
|
0,
|
|
0,
|
|
(enum rf_path)0,
|
|
0);
|
|
PHYDM_DBG(dm, ODM_COMP_INIT,
|
|
"phy param offload end!result = %d", result);
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
enum hal_status
|
|
odm_config_mac_with_header_file(
|
|
struct dm_struct *dm
|
|
)
|
|
{
|
|
enum hal_status result = HAL_STATUS_SUCCESS;
|
|
PHYDM_DBG(dm, ODM_COMP_INIT,
|
|
"===>odm_config_mac_with_header_file (%s)\n", (dm->is_mp_chip) ? "MPChip" : "TestChip");
|
|
PHYDM_DBG(dm, ODM_COMP_INIT,
|
|
"support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
|
|
dm->support_platform, dm->support_interface, dm->board_type);
|
|
|
|
/* 1 AP doesn't use PHYDM initialization in these ICs */
|
|
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
|
|
#if (RTL8812A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8812)
|
|
READ_AND_CONFIG_MP(8812a, _mac_reg);
|
|
#endif
|
|
#if (RTL8821A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821)
|
|
READ_AND_CONFIG_MP(8821a, _mac_reg);
|
|
#endif
|
|
#if (RTL8192E_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8192E)
|
|
READ_AND_CONFIG_MP(8192e, _mac_reg);
|
|
#endif
|
|
#if (RTL8723D_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8723D)
|
|
READ_AND_CONFIG_MP(8723d, _mac_reg);
|
|
#endif
|
|
/* JJ ADD 20161014 */
|
|
#if (RTL8710B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8710B)
|
|
READ_AND_CONFIG_MP(8710b, _mac_reg);
|
|
#endif
|
|
|
|
#endif/* (DM_ODM_SUPPORT_TYPE != ODM_AP) */
|
|
|
|
/* 1 All platforms support */
|
|
#if (RTL8188E_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8188E)
|
|
READ_AND_CONFIG_MP(8188e, _mac_reg);
|
|
#endif
|
|
#if (RTL8723B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8723B)
|
|
READ_AND_CONFIG_MP(8723b, _mac_reg);
|
|
#endif
|
|
#if (RTL8814A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8814A)
|
|
READ_AND_CONFIG_MP(8814a, _mac_reg);
|
|
#endif
|
|
#if (RTL8703B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8703B)
|
|
READ_AND_CONFIG_MP(8703b, _mac_reg);
|
|
#endif
|
|
#if (RTL8188F_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8188F)
|
|
READ_AND_CONFIG_MP(8188f, _mac_reg);
|
|
#endif
|
|
#if (RTL8822B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8822B)
|
|
READ_AND_CONFIG_MP(8822b, _mac_reg);
|
|
#endif
|
|
|
|
#if (RTL8197F_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8197F)
|
|
READ_AND_CONFIG_MP(8197f, _mac_reg);
|
|
#endif
|
|
|
|
#if (RTL8821C_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821C)
|
|
READ_AND_CONFIG(8821c, _mac_reg);
|
|
#endif
|
|
|
|
#if (RTL8195A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8195A)
|
|
READ_AND_CONFIG_MP(8195a, _mac_reg);
|
|
#endif
|
|
|
|
if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
|
|
result = phydm_set_reg_by_fw(dm,
|
|
PHYDM_HALMAC_CMD_END,
|
|
0,
|
|
0,
|
|
0,
|
|
(enum rf_path)0,
|
|
0);
|
|
PHYDM_DBG(dm, ODM_COMP_INIT,
|
|
"mac param offload end!result = %d", result);
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
u32
|
|
odm_get_hw_img_version(
|
|
struct dm_struct *dm
|
|
)
|
|
{
|
|
u32 version = 0;
|
|
|
|
/* 1 AP doesn't use PHYDM initialization in these ICs */
|
|
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
|
|
#if (RTL8821A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821)
|
|
version = GET_VERSION_MP(8821a, _mac_reg);
|
|
#endif
|
|
#if (RTL8192E_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8192E)
|
|
version = GET_VERSION_MP(8192e, _mac_reg);
|
|
#endif
|
|
#if (RTL8812A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8812)
|
|
version = GET_VERSION_MP(8812a, _mac_reg);
|
|
#endif
|
|
#if (RTL8723D_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8723D)
|
|
version = GET_VERSION_MP(8723d, _mac_reg);
|
|
#endif
|
|
/* JJ ADD 20161014 */
|
|
#if (RTL8710B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8710B)
|
|
version = GET_VERSION_MP(8710b, _mac_reg);
|
|
#endif
|
|
|
|
#endif /* (DM_ODM_SUPPORT_TYPE != ODM_AP) */
|
|
|
|
/*1 All platforms support*/
|
|
#if (RTL8188E_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8188E)
|
|
version = GET_VERSION_MP(8188e, _mac_reg);
|
|
#endif
|
|
#if (RTL8723B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8723B)
|
|
version = GET_VERSION_MP(8723b, _mac_reg);
|
|
#endif
|
|
#if (RTL8814A_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8814A)
|
|
version = GET_VERSION_MP(8814a, _mac_reg);
|
|
#endif
|
|
#if (RTL8703B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8703B)
|
|
version = GET_VERSION_MP(8703b, _mac_reg);
|
|
#endif
|
|
#if (RTL8188F_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8188F)
|
|
version = GET_VERSION_MP(8188f, _mac_reg);
|
|
#endif
|
|
#if (RTL8822B_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8822B)
|
|
version = GET_VERSION_MP(8822b, _mac_reg);
|
|
#endif
|
|
|
|
#if (RTL8197F_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8197F)
|
|
version = GET_VERSION_MP(8197f, _mac_reg);
|
|
#endif
|
|
|
|
#if (RTL8821C_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821C)
|
|
version = GET_VERSION(8821c, _mac_reg);
|
|
#endif
|
|
|
|
return version;
|
|
}
|
|
|
|
|
|
u32
|
|
query_phydm_trx_capability(
|
|
struct dm_struct *dm
|
|
)
|
|
{
|
|
u32 value32 = 0xFFFFFFFF;
|
|
|
|
#if (RTL8821C_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821C)
|
|
value32 = query_phydm_trx_capability_8821c(dm);
|
|
#endif
|
|
|
|
return value32;
|
|
}
|
|
|
|
u32
|
|
query_phydm_stbc_capability(
|
|
struct dm_struct *dm
|
|
)
|
|
{
|
|
u32 value32 = 0xFFFFFFFF;
|
|
|
|
#if (RTL8821C_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821C)
|
|
value32 = query_phydm_stbc_capability_8821c(dm);
|
|
#endif
|
|
|
|
return value32;
|
|
}
|
|
|
|
u32
|
|
query_phydm_ldpc_capability(
|
|
struct dm_struct *dm
|
|
)
|
|
{
|
|
u32 value32 = 0xFFFFFFFF;
|
|
|
|
#if (RTL8821C_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821C)
|
|
value32 = query_phydm_ldpc_capability_8821c(dm);
|
|
#endif
|
|
|
|
return value32;
|
|
}
|
|
|
|
u32
|
|
query_phydm_txbf_parameters(
|
|
struct dm_struct *dm
|
|
)
|
|
{
|
|
u32 value32 = 0xFFFFFFFF;
|
|
|
|
#if (RTL8821C_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821C)
|
|
value32 = query_phydm_txbf_parameters_8821c(dm);
|
|
#endif
|
|
|
|
return value32;
|
|
}
|
|
|
|
u32
|
|
query_phydm_txbf_capability(
|
|
struct dm_struct *dm
|
|
)
|
|
{
|
|
u32 value32 = 0xFFFFFFFF;
|
|
|
|
#if (RTL8821C_SUPPORT == 1)
|
|
if (dm->support_ic_type == ODM_RTL8821C)
|
|
value32 = query_phydm_txbf_capability_8821c(dm);
|
|
#endif
|
|
|
|
return value32;
|
|
}
|