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New upstream version 5.3.9~20191129

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This commit is contained in:
Sophie Brun
2019-12-17 17:14:15 +01:00
commit 64d530c26f
497 changed files with 379081 additions and 0 deletions
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1305
hal/phydm/halrf/halphyrf_ap.c Normal file
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hal/phydm/halrf/halphyrf_ap.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HAL_PHY_RF_H__
#define __HAL_PHY_RF_H__
#include "halrf/halrf_powertracking_ap.h"
#include "halrf/halrf_kfree.h"
#if (RTL8814A_SUPPORT == 1)
#include "halrf/rtl8814a/halrf_iqk_8814a.h"
#endif
#if (RTL8822B_SUPPORT == 1)
#include "halrf/rtl8822b/halrf_iqk_8822b.h"
#endif
#if (RTL8821C_SUPPORT == 1)
#include "halrf/rtl8821c/halrf_iqk_8821c.h"
#endif
enum pwrtrack_method {
BBSWING,
TXAGC,
MIX_MODE,
TSSI_MODE
};
typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void(*func_iqk)(void *, u8, u8, u8);
typedef void (*func_lck)(void *);
/* refine by YuChen for 8814A */
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_all_swing)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **);
struct txpwrtrack_cfg {
u8 swing_table_size_cck;
u8 swing_table_size_ofdm;
u8 threshold_iqk;
u8 threshold_dpk;
u8 average_thermal_num;
u8 rf_path_count;
u32 thermal_reg_addr;
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_all_swing get_delta_all_swing_table;
};
void
configure_txpower_track(
void *dm_void,
struct txpwrtrack_cfg *config
);
void
odm_txpowertracking_callback_thermal_meter(
void *dm_void
);
#if (RTL8192E_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_92e(
void *dm_void
);
#endif
#if (RTL8814A_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_jaguar_series2(
void *dm_void
);
#elif ODM_IC_11AC_SERIES_SUPPORT
void
odm_txpowertracking_callback_thermal_meter_jaguar_series(
void *dm_void
);
#elif (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_jaguar_series3(
void *dm_void
);
#endif
#define IS_CCK_RATE(_rate) (ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M)
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void
odm_reset_iqk_result(
void *dm_void
);
u8
odm_get_right_chnl_place_for_iqk(
u8 chnl
);
void phydm_rf_init(void *dm_void);
void phydm_rf_watchdog(void *dm_void);
#endif /* #ifndef __HAL_PHY_RF_H__ */

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hal/phydm/halrf/halphyrf_ce.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#include "mp_precomp.h"
#include "phydm_precomp.h"
#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \
do {\
for (_offset = 0; _offset < _size; _offset++) { \
if (_delta_thermal < thermal_threshold[_direction][_offset]) { \
if (_offset != 0)\
_offset--;\
break;\
} \
} \
if (_offset >= _size)\
_offset = _size-1;\
} while (0)
void configure_txpower_track(
void *dm_void,
struct txpwrtrack_cfg *config
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if RTL8192E_SUPPORT
if (dm->support_ic_type == ODM_RTL8192E)
configure_txpower_track_8192e(config);
#endif
#if RTL8821A_SUPPORT
if (dm->support_ic_type == ODM_RTL8821)
configure_txpower_track_8821a(config);
#endif
#if RTL8812A_SUPPORT
if (dm->support_ic_type == ODM_RTL8812)
configure_txpower_track_8812a(config);
#endif
#if RTL8188E_SUPPORT
if (dm->support_ic_type == ODM_RTL8188E)
configure_txpower_track_8188e(config);
#endif
#if RTL8723B_SUPPORT
if (dm->support_ic_type == ODM_RTL8723B)
configure_txpower_track_8723b(config);
#endif
#if RTL8814A_SUPPORT
if (dm->support_ic_type == ODM_RTL8814A)
configure_txpower_track_8814a(config);
#endif
#if RTL8703B_SUPPORT
if (dm->support_ic_type == ODM_RTL8703B)
configure_txpower_track_8703b(config);
#endif
#if RTL8188F_SUPPORT
if (dm->support_ic_type == ODM_RTL8188F)
configure_txpower_track_8188f(config);
#endif
#if RTL8723D_SUPPORT
if (dm->support_ic_type == ODM_RTL8723D)
configure_txpower_track_8723d(config);
#endif
/* JJ ADD 20161014 */
#if RTL8710B_SUPPORT
if (dm->support_ic_type == ODM_RTL8710B)
configure_txpower_track_8710b(config);
#endif
#if RTL8822B_SUPPORT
if (dm->support_ic_type == ODM_RTL8822B)
configure_txpower_track_8822b(config);
#endif
#if RTL8821C_SUPPORT
if (dm->support_ic_type == ODM_RTL8821C)
configure_txpower_track_8821c(config);
#endif
}
/* **********************************************************************
* <20121113, Kordan> This function should be called when tx_agc changed.
* Otherwise the previous compensation is gone, because we record the
* delta of temperature between two TxPowerTracking watch dogs.
*
* NOTE: If Tx BB swing or Tx scaling is varified during run-time, still
* need to call this function.
* ********************************************************************** */
void
odm_clear_txpowertracking_state(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv);
#else
PHAL_DATA_TYPE hal_data = GET_HAL_DATA(dm->adapter);
#endif
u8 p = 0;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
cali_info->bb_swing_idx_cck = cali_info->default_cck_index;
dm->rf_calibrate_info.CCK_index = 0;
for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index;
cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
cali_info->power_index_offset[p] = 0;
cali_info->delta_power_index[p] = 0;
cali_info->delta_power_index_last[p] = 0;
cali_info->absolute_ofdm_swing_idx[p] = 0; /* Initial Mix mode power tracking*/
cali_info->remnant_ofdm_swing_idx[p] = 0;
cali_info->kfree_offset[p] = 0;
}
cali_info->modify_tx_agc_flag_path_a = false; /*Initial at Modify Tx Scaling mode*/
cali_info->modify_tx_agc_flag_path_b = false; /*Initial at Modify Tx Scaling mode*/
cali_info->modify_tx_agc_flag_path_c = false; /*Initial at Modify Tx Scaling mode*/
cali_info->modify_tx_agc_flag_path_d = false; /*Initial at Modify Tx Scaling mode*/
cali_info->remnant_cck_swing_idx = 0;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
cali_info->thermal_value = rtlefu->eeprom_thermalmeter;
#else
cali_info->thermal_value = hal_data->eeprom_thermal_meter;
#endif
cali_info->modify_tx_agc_value_cck = 0; /* modify by Mingzhi.Guo */
cali_info->modify_tx_agc_value_ofdm = 0; /* modify by Mingzhi.Guo */
}
void
odm_txpowertracking_callback_thermal_meter(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
struct dm_struct *dm
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
void *dm_void
#else
void *adapter
#endif
)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv);
void *adapter = dm->adapter;
#elif !(DM_ODM_SUPPORT_TYPE & ODM_AP)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_struct *dm = &hal_data->DM_OutSrc;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
struct dm_struct *dm = (struct dm_struct *)dm_void;
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
#endif
#endif
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct dm_iqk_info *iqk_info = &dm->IQK_info;
u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;
s8 diff_DPK[4] = {0};
u8 thermal_value_avg_count = 0;
u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4;
u8 OFDM_min_index = 0; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
u8 indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
u8 power_tracking_type = 0; /* no specify type */
#else
u8 power_tracking_type = hal_data->rf_power_tracking_type;
#endif
u8 xtal_offset_eanble = 0;
s8 thermal_value_temp = 0;
struct txpwrtrack_cfg c = {0};
/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
u8 *delta_swing_table_idx_tup_a = NULL;
u8 *delta_swing_table_idx_tdown_a = NULL;
u8 *delta_swing_table_idx_tup_b = NULL;
u8 *delta_swing_table_idx_tdown_b = NULL;
/*for 8814 add by Yu Chen*/
u8 *delta_swing_table_idx_tup_c = NULL;
u8 *delta_swing_table_idx_tdown_c = NULL;
u8 *delta_swing_table_idx_tup_d = NULL;
u8 *delta_swing_table_idx_tdown_d = NULL;
/*for Xtal Offset by James.Tung*/
s8 *delta_swing_table_xtal_up = NULL;
s8 *delta_swing_table_xtal_down = NULL;
/* 4 2. Initilization ( 7 steps in total ) */
configure_txpower_track(dm, &c);
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
if (dm->support_ic_type & ODM_RTL8814A) /*for 8814 path C & D*/
(*c.get_delta_swing_table8814only)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
/* JJ ADD 20161014 */
if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) /*for Xtal Offset*/
(*c.get_delta_swing_xtal_table)(dm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down);
cali_info->txpowertracking_callback_cnt++; /*cosa add for debug*/
cali_info->is_txpowertracking_init = true;
/*cali_info->txpowertrack_control = hal_data->txpowertrack_control;
<Kordan> We should keep updating the control variable according to HalData.
<Kordan> rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (MP_DRIVER == 1)
cali_info->rega24 = 0x090e1317;
#endif
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
if (*(dm->mp_mode) == true)
cali_info->rega24 = 0x090e1317;
#endif
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n",
cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"cali_info->txpowertrack_control=%d, rtlefu->eeprom_thermalmeter %d\n", cali_info->txpowertrack_control, rtlefu->eeprom_thermalmeter);
#else
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"cali_info->txpowertrack_control=%d, hal_data->eeprom_thermal_meter %d\n", cali_info->txpowertrack_control, hal_data->eeprom_thermal_meter);
#endif
thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm);
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"thermal_value_temp(%d) = thermal_value(%d) + power_trim_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm));
if (thermal_value_temp > 63)
thermal_value = 63;
else if (thermal_value_temp < 0)
thermal_value = 0;
else
thermal_value = thermal_value_temp;
/*add log by zhao he, check c80/c94/c14/ca0 value*/
if (dm->support_ic_type == ODM_RTL8723D) {
regc80 = odm_get_bb_reg(dm, 0xc80, MASKDWORD);
regcd0 = odm_get_bb_reg(dm, 0xcd0, MASKDWORD);
regcd4 = odm_get_bb_reg(dm, 0xcd4, MASKDWORD);
regab4 = odm_get_bb_reg(dm, 0xab4, 0x000007FF);
PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4);
}
/* JJ ADD 20161014 */
if (dm->support_ic_type == ODM_RTL8710B) {
regc80 = odm_get_bb_reg(dm, 0xc80, MASKDWORD);
regcd0 = odm_get_bb_reg(dm, 0xcd0, MASKDWORD);
regcd4 = odm_get_bb_reg(dm, 0xcd4, MASKDWORD);
regab4 = odm_get_bb_reg(dm, 0xab4, 0x000007FF);
PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4);
}
if (!cali_info->txpowertrack_control)
return;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
if (rtlefu->eeprom_thermalmeter == 0xff) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", rtlefu->eeprom_thermalmeter);
return;
}
#else
if (hal_data->eeprom_thermal_meter == 0xff) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", hal_data->eeprom_thermal_meter);
return;
}
#endif
/*4 3. Initialize ThermalValues of rf_calibrate_info*/
if (cali_info->is_reloadtxpowerindex)
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "reload ofdm index for band switch\n");
/*4 4. Calculate average thermal meter*/
cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] = thermal_value;
cali_info->thermal_value_avg_index++;
if (cali_info->thermal_value_avg_index == c.average_thermal_num) /*Average times = c.average_thermal_num*/
cali_info->thermal_value_avg_index = 0;
for (i = 0; i < c.average_thermal_num; i++) {
if (cali_info->thermal_value_avg[i]) {
thermal_value_avg += cali_info->thermal_value_avg[i];
thermal_value_avg_count++;
}
}
if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */
thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
cali_info->thermal_value_delta = thermal_value - rtlefu->eeprom_thermalmeter;
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, rtlefu->eeprom_thermalmeter);
#else
cali_info->thermal_value_delta = thermal_value - hal_data->eeprom_thermal_meter;
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, hal_data->eeprom_thermal_meter);
#endif
}
/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
/* "delta" here is used to determine whether thermal value changes or not. */
delta = (thermal_value > cali_info->thermal_value) ? (thermal_value - cali_info->thermal_value) : (cali_info->thermal_value - thermal_value);
delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value);
delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value);
if (cali_info->thermal_value_iqk == 0xff) { /*no PG, use thermal value for IQK*/
cali_info->thermal_value_iqk = thermal_value;
delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value);
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no PG, use thermal_value for IQK\n");
}
for (p = RF_PATH_A; p < c.rf_path_count; p++)
diff_DPK[p] = (s8)thermal_value - (s8)cali_info->dpk_thermal[p];
/*4 6. If necessary, do LCK.*/
if (!(dm->support_ic_type & ODM_RTL8821)) { /*no PG, do LCK at initial status*/
if (cali_info->thermal_value_lck == 0xff) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no PG, do LCK\n");
cali_info->thermal_value_lck = thermal_value;
/*Use RTLCK, so close power tracking driver LCK*/
if (!(dm->support_ic_type & ODM_RTL8814A) && !(dm->support_ic_type & ODM_RTL8822B) && c.phy_lc_calibrate)
(*c.phy_lc_calibrate)(dm);
delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value);
}
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK);
/* Wait sacn to do LCK by RF Jenyu*/
if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
/* Delta temperature is equal to or larger than 20 centigrade.*/
if (delta_LCK >= c.threshold_iqk) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
cali_info->thermal_value_lck = thermal_value;
/*Use RTLCK, so close power tracking driver LCK*/
if (!(dm->support_ic_type & ODM_RTL8814A) && !(dm->support_ic_type & ODM_RTL8822B) && c.phy_lc_calibrate)
(*c.phy_lc_calibrate)(dm);
}
}
}
/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
if (delta > 0 && cali_info->txpowertrack_control) {
/* "delta" here is used to record the absolute value of differrence. */
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
delta = thermal_value > rtlefu->eeprom_thermalmeter ? (thermal_value - rtlefu->eeprom_thermalmeter) : (rtlefu->eeprom_thermalmeter - thermal_value);
#else
delta = thermal_value > hal_data->eeprom_thermal_meter ? (thermal_value - hal_data->eeprom_thermal_meter) : (hal_data->eeprom_thermal_meter - thermal_value);
#endif
#else
delta = (thermal_value > dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - dm->priv->pmib->dot11RFEntry.ther) : (dm->priv->pmib->dot11RFEntry.ther - thermal_value);
#endif
if (delta >= TXPWR_TRACK_TABLE_SIZE)
delta = TXPWR_TRACK_TABLE_SIZE - 1;
/*4 7.1 The Final Power index = BaseIndex + power_index_offset*/
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
if (thermal_value > rtlefu->eeprom_thermalmeter) {
#else
if (thermal_value > hal_data->eeprom_thermal_meter) {
#endif
#else
if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) {
#endif
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/
switch (p) {
case RF_PATH_B:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]);
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_b[delta];
cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
case RF_PATH_C:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]);
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_c[delta];
cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
case RF_PATH_D:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]);
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_d[delta];
cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
default:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]);
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta];
cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
}
}
/* JJ ADD 20161014 */
if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
/*Save xtal_offset from Xtal table*/
cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]);
cali_info->xtal_offset = delta_swing_table_xtal_up[delta];
xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset);
}
} else {
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/
switch (p) {
case RF_PATH_B:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]);
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
case RF_PATH_C:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]);
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_c[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
case RF_PATH_D:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]);
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_d[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
default:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]);
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
}
}
/* JJ ADD 20161014 */
if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
/*Save xtal_offset from Xtal table*/
cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]);
cali_info->xtal_offset = delta_swing_table_xtal_down[delta];
xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset);
}
}
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p);
if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/
cali_info->power_index_offset[p] = 0;
else
cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]);
cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p];
cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p];
cali_info->bb_swing_idx_cck = cali_info->CCK_index;
cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p];
/*************Print BB Swing base and index Offset*************/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]);
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]);
/*4 7.1 Handle boundary conditions of index.*/
if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1)
cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1;
else if (cali_info->OFDM_index[p] <= OFDM_min_index)
cali_info->OFDM_index[p] = OFDM_min_index;
}
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"\n\n========================================================================================================\n");
if (cali_info->CCK_index > c.swing_table_size_cck - 1)
cali_info->CCK_index = c.swing_table_size_cck - 1;
else if (cali_info->CCK_index <= 0)
cali_info->CCK_index = 0;
} else {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n",
cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value);
for (p = RF_PATH_A; p < c.rf_path_count; p++)
cali_info->power_index_offset[p] = 0;
}
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n",
cali_info->CCK_index, cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n",
cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]);
}
if ((dm->support_ic_type & ODM_RTL8814A)) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "power_tracking_type=%d\n", power_tracking_type);
if (power_tracking_type == 0) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
} else if (power_tracking_type == 1) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_2G_TSSI_5G_MODE, p, 0);
} else if (power_tracking_type == 2) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_5G_TSSI_2G_MODE, p, 0);
} else if (power_tracking_type == 3) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, TSSI_MODE, p, 0);
}
cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/
} else if ((cali_info->power_index_offset[RF_PATH_A] != 0 ||
cali_info->power_index_offset[RF_PATH_B] != 0 ||
cali_info->power_index_offset[RF_PATH_C] != 0 ||
cali_info->power_index_offset[RF_PATH_D] != 0) &&
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
cali_info->txpowertrack_control && (rtlefu->eeprom_thermalmeter != 0xff)) {
#else
cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) {
#endif
/* 4 7.2 Configure the Swing Table to adjust Tx Power. */
cali_info->is_tx_power_changed = true; /*Always true after Tx Power is adjusted by power tracking.*/
/* */
/* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */
/* to increase TX power. Otherwise, EVM will be bad. */
/* */
/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
if (thermal_value > cali_info->thermal_value) {
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
p, cali_info->power_index_offset[p], delta, thermal_value, rtlefu->eeprom_thermalmeter, cali_info->thermal_value);
#else
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value);
#endif
}
} else if (thermal_value < cali_info->thermal_value) { /*Low temperature*/
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
p, cali_info->power_index_offset[p], delta, thermal_value, rtlefu->eeprom_thermalmeter, cali_info->thermal_value);
#else
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value);
#endif
}
}
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
if (thermal_value > rtlefu->eeprom_thermalmeter)
#else
if (thermal_value > hal_data->eeprom_thermal_meter)
#endif
#else
if (thermal_value > dm->priv->pmib->dot11RFEntry.ther)
#endif
{
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter);
#else
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
#endif
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 ||
dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A ||
dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B ||
dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
} else {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
}
} else {
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter);
#else
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
#endif
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 ||
dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A ||
dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B ||
dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel);
} else {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
}
}
cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; /*Record last time Power Tracking result as base.*/
for (p = RF_PATH_A; p < c.rf_path_count; p++)
cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p];
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value);
cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/
}
if (dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (rtlefu->eeprom_thermalmeter != 0xff)) {
#else
if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) {
#endif
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n");
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
if (thermal_value > rtlefu->eeprom_thermalmeter) {
#else
if (thermal_value > hal_data->eeprom_thermal_meter) {
#endif
#else
if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) {
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter);
#else
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
#endif
(*c.odm_txxtaltrack_set_xtal)(dm);
} else {
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter);
#else
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
#endif
(*c.odm_txxtaltrack_set_xtal)(dm);
}
}
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********End Xtal Tracking**********\n");
}
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
/* Wait sacn to do IQK by RF Jenyu*/
if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
if (!IS_HARDWARE_TYPE_8723B(adapter)) {
/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
if (delta_IQK >= c.threshold_iqk) {
cali_info->thermal_value_iqk = thermal_value;
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
if (!cali_info->is_iqk_in_progress)
(*c.do_iqk)(dm, delta_IQK, thermal_value, 8);
}
}
}
if (cali_info->dpk_thermal[RF_PATH_A] != 0) {
if (diff_DPK[RF_PATH_A] >= c.threshold_dpk) {
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk));
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
} else if ((diff_DPK[RF_PATH_A] <= -1 * c.threshold_dpk)) {
s32 value = 0x20 + (diff_DPK[RF_PATH_A] / c.threshold_dpk);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
} else {
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
}
}
if (cali_info->dpk_thermal[RF_PATH_B] != 0) {
if (diff_DPK[RF_PATH_B] >= c.threshold_dpk) {
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk));
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
} else if ((diff_DPK[RF_PATH_B] <= -1 * c.threshold_dpk)) {
s32 value = 0x20 + (diff_DPK[RF_PATH_B] / c.threshold_dpk);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
} else {
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
}
}
#endif
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n");
cali_info->tx_powercount = 0;
}
/* 3============================================================
* 3 IQ Calibration
* 3============================================================ */
void
odm_reset_iqk_result(
void *dm_void
)
{
return;
}
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
{
u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165
};
u8 place = chnl;
if (chnl > 14) {
for (place = 14; place < sizeof(channel_all); place++) {
if (channel_all[place] == chnl)
return place - 13;
}
}
return 0;
}
#endif
void
odm_iq_calibrate(
struct dm_struct *dm
)
{
void *adapter = dm->adapter;
struct dm_iqk_info *iqk_info = &dm->IQK_info;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
if (*dm->is_fcs_mode_enable)
return;
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
if (IS_HARDWARE_TYPE_8812AU(adapter))
return;
#endif
if ((dm->is_linked) && (!iqk_info->rfk_forbidden)) {
if ((*dm->channel != dm->pre_channel) && (!*dm->is_scan_in_process)) {
dm->pre_channel = *dm->channel;
dm->linked_interval = 0;
}
if (dm->linked_interval < 3)
dm->linked_interval++;
if (dm->linked_interval == 2)
halrf_iqk_trigger(dm, false);
} else
dm->linked_interval = 0;
}
void phydm_rf_init(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
odm_txpowertracking_init(dm);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
odm_clear_txpowertracking_state(dm);
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#if (RTL8814A_SUPPORT == 1)
if (dm->support_ic_type & ODM_RTL8814A)
phy_iq_calibrate_8814a_init(dm);
#endif
#endif
}
void phydm_rf_watchdog(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
odm_txpowertracking_check(dm);
/*if (dm->support_ic_type & ODM_IC_11AC_SERIES)*/
/*odm_iq_calibrate(dm);*/
#endif
}

124
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HAL_PHY_RF_H__
#define __HAL_PHY_RF_H__
#include "halrf/halrf_kfree.h"
#if (RTL8814A_SUPPORT == 1)
#include "halrf/rtl8814a/halrf_iqk_8814a.h"
#endif
#if (RTL8822B_SUPPORT == 1)
#include "halrf/rtl8822b/halrf_iqk_8822b.h"
#endif
#if (RTL8821C_SUPPORT == 1)
#include "halrf/rtl8821c/halrf_iqk_8821c.h"
#endif
#include "halrf/halrf_powertracking_ce.h"
enum spur_cal_method {
PLL_RESET,
AFE_PHASE_SEL
};
enum pwrtrack_method {
BBSWING,
TXAGC,
MIX_MODE,
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE
};
typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void(*func_iqk)(void *, u8, u8, u8);
typedef void (*func_lck)(void *);
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void(*func_swing_xtal)(void *, s8 **, s8 **);
typedef void(*func_set_xtal)(void *);
struct txpwrtrack_cfg {
u8 swing_table_size_cck;
u8 swing_table_size_ofdm;
u8 threshold_iqk;
u8 threshold_dpk;
u8 average_thermal_num;
u8 rf_path_count;
u32 thermal_reg_addr;
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_swing_xtal get_delta_swing_xtal_table;
func_set_xtal odm_txxtaltrack_set_xtal;
};
void
configure_txpower_track(
void *dm_void,
struct txpwrtrack_cfg *config
);
void
odm_clear_txpowertracking_state(
void *dm_void
);
void
odm_txpowertracking_callback_thermal_meter(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
void *dm_void
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
void *dm
#else
void *adapter
#endif
);
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void
odm_reset_iqk_result(
void *dm_void
);
u8
odm_get_right_chnl_place_for_iqk(
u8 chnl
);
void phydm_rf_init(void *dm_void);
void phydm_rf_watchdog(void *dm_void);
#endif /* #ifndef __HAL_PHY_RF_H__ */

817
hal/phydm/halrf/halphyrf_win.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include "mp_precomp.h"
#include "phydm_precomp.h"
#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \
do {\
for (_offset = 0; _offset < _size; _offset++) { \
\
if (_delta_thermal < thermal_threshold[_direction][_offset]) { \
\
if (_offset != 0)\
_offset--;\
break;\
} \
} \
if (_offset >= _size)\
_offset = _size-1;\
} while (0)
void configure_txpower_track(
struct dm_struct *dm,
struct txpwrtrack_cfg *config
)
{
#if RTL8192E_SUPPORT
if (dm->support_ic_type == ODM_RTL8192E)
configure_txpower_track_8192e(config);
#endif
#if RTL8821A_SUPPORT
if (dm->support_ic_type == ODM_RTL8821)
configure_txpower_track_8821a(config);
#endif
#if RTL8812A_SUPPORT
if (dm->support_ic_type == ODM_RTL8812)
configure_txpower_track_8812a(config);
#endif
#if RTL8188E_SUPPORT
if (dm->support_ic_type == ODM_RTL8188E)
configure_txpower_track_8188e(config);
#endif
#if RTL8188F_SUPPORT
if (dm->support_ic_type == ODM_RTL8188F)
configure_txpower_track_8188f(config);
#endif
#if RTL8723B_SUPPORT
if (dm->support_ic_type == ODM_RTL8723B)
configure_txpower_track_8723b(config);
#endif
#if RTL8814A_SUPPORT
if (dm->support_ic_type == ODM_RTL8814A)
configure_txpower_track_8814a(config);
#endif
#if RTL8703B_SUPPORT
if (dm->support_ic_type == ODM_RTL8703B)
configure_txpower_track_8703b(config);
#endif
#if RTL8822B_SUPPORT
if (dm->support_ic_type == ODM_RTL8822B)
configure_txpower_track_8822b(config);
#endif
#if RTL8723D_SUPPORT
if (dm->support_ic_type == ODM_RTL8723D)
configure_txpower_track_8723d(config);
#endif
/* JJ ADD 20161014 */
#if RTL8710B_SUPPORT
if (dm->support_ic_type == ODM_RTL8710B)
configure_txpower_track_8710b(config);
#endif
#if RTL8821C_SUPPORT
if (dm->support_ic_type == ODM_RTL8821C)
configure_txpower_track_8821c(config);
#endif
}
/* **********************************************************************
* <20121113, Kordan> This function should be called when tx_agc changed.
* Otherwise the previous compensation is gone, because we record the
* delta of temperature between two TxPowerTracking watch dogs.
*
* NOTE: If Tx BB swing or Tx scaling is varified during run-time, still
* need to call this function.
* ********************************************************************** */
void
odm_clear_txpowertracking_state(
struct dm_struct *dm
)
{
PHAL_DATA_TYPE hal_data = GET_HAL_DATA((PADAPTER)(dm->adapter));
u8 p = 0;
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
cali_info->bb_swing_idx_cck = cali_info->default_cck_index;
cali_info->CCK_index = 0;
for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index;
cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
cali_info->power_index_offset[p] = 0;
cali_info->delta_power_index[p] = 0;
cali_info->delta_power_index_last[p] = 0;
cali_info->absolute_ofdm_swing_idx[p] = 0; /* Initial Mix mode power tracking*/
cali_info->remnant_ofdm_swing_idx[p] = 0;
cali_info->kfree_offset[p] = 0;
}
cali_info->modify_tx_agc_flag_path_a = false; /*Initial at Modify Tx Scaling mode*/
cali_info->modify_tx_agc_flag_path_b = false; /*Initial at Modify Tx Scaling mode*/
cali_info->modify_tx_agc_flag_path_c = false; /*Initial at Modify Tx Scaling mode*/
cali_info->modify_tx_agc_flag_path_d = false; /*Initial at Modify Tx Scaling mode*/
cali_info->remnant_cck_swing_idx = 0;
cali_info->thermal_value = hal_data->eeprom_thermal_meter;
cali_info->modify_tx_agc_value_cck = 0; /* modify by Mingzhi.Guo */
cali_info->modify_tx_agc_value_ofdm = 0; /* modify by Mingzhi.Guo */
}
void
odm_txpowertracking_callback_thermal_meter(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
struct dm_struct *dm
#else
void *adapter
#endif
)
{
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
struct dm_struct *dm = &hal_data->DM_OutSrc;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
struct dm_struct *dm = &hal_data->odmpriv;
#endif
#endif
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct dm_iqk_info *iqk_info = &dm->IQK_info;
u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;
s8 diff_DPK[4] = {0};
u8 thermal_value_avg_count = 0;
u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4;
u8 OFDM_min_index = 0; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
u8 indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */
u8 power_tracking_type = hal_data->RfPowerTrackingType;
u8 xtal_offset_eanble = 0;
s8 thermal_value_temp = 0;
struct txpwrtrack_cfg c;
/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
u8 *delta_swing_table_idx_tup_a = NULL;
u8 *delta_swing_table_idx_tdown_a = NULL;
u8 *delta_swing_table_idx_tup_b = NULL;
u8 *delta_swing_table_idx_tdown_b = NULL;
/*for 8814 add by Yu Chen*/
u8 *delta_swing_table_idx_tup_c = NULL;
u8 *delta_swing_table_idx_tdown_c = NULL;
u8 *delta_swing_table_idx_tup_d = NULL;
u8 *delta_swing_table_idx_tdown_d = NULL;
/*for Xtal Offset by James.Tung*/
s8 *delta_swing_table_xtal_up = NULL;
s8 *delta_swing_table_xtal_down = NULL;
/* 4 2. Initilization ( 7 steps in total ) */
configure_txpower_track(dm, &c);
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
if (dm->support_ic_type & ODM_RTL8814A) /*for 8814 path C & D*/
(*c.get_delta_swing_table8814only)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
/* JJ ADD 20161014 */
if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) /*for Xtal Offset*/
(*c.get_delta_swing_xtal_table)(dm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down);
cali_info->txpowertracking_callback_cnt++; /*cosa add for debug*/
cali_info->is_txpowertracking_init = true;
/*cali_info->txpowertrack_control = hal_data->txpowertrack_control;
<Kordan> We should keep updating the control variable according to HalData.
<Kordan> rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (MP_DRIVER == 1)
cali_info->rega24 = 0x090e1317;
#endif
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
if (*(dm->mp_mode) == true)
cali_info->rega24 = 0x090e1317;
#endif
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n",
cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index);
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"cali_info->txpowertrack_control=%d, hal_data->eeprom_thermal_meter %d\n", cali_info->txpowertrack_control, hal_data->eeprom_thermal_meter);
thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm);
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"thermal_value_temp(%d) = thermal_value(%d) + power_time_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm));
if (thermal_value_temp > 63)
thermal_value = 63;
else if (thermal_value_temp < 0)
thermal_value = 0;
else
thermal_value = thermal_value_temp;
/*add log by zhao he, check c80/c94/c14/ca0 value*/
if (dm->support_ic_type == ODM_RTL8723D) {
regc80 = odm_get_bb_reg(dm, 0xc80, MASKDWORD);
regcd0 = odm_get_bb_reg(dm, 0xcd0, MASKDWORD);
regcd4 = odm_get_bb_reg(dm, 0xcd4, MASKDWORD);
regab4 = odm_get_bb_reg(dm, 0xab4, 0x000007FF);
PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4);
}
/* JJ ADD 20161014 */
if (dm->support_ic_type == ODM_RTL8710B) {
regc80 = odm_get_bb_reg(dm, 0xc80, MASKDWORD);
regcd0 = odm_get_bb_reg(dm, 0xcd0, MASKDWORD);
regcd4 = odm_get_bb_reg(dm, 0xcd4, MASKDWORD);
regab4 = odm_get_bb_reg(dm, 0xab4, 0x000007FF);
PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4);
}
if (!cali_info->txpowertrack_control)
return;
if (hal_data->eeprom_thermal_meter == 0xff) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", hal_data->eeprom_thermal_meter);
return;
}
/*4 3. Initialize ThermalValues of rf_calibrate_info*/
if (cali_info->is_reloadtxpowerindex)
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "reload ofdm index for band switch\n");
/*4 4. Calculate average thermal meter*/
cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] = thermal_value;
cali_info->thermal_value_avg_index++;
if (cali_info->thermal_value_avg_index == c.average_thermal_num) /*Average times = c.average_thermal_num*/
cali_info->thermal_value_avg_index = 0;
for (i = 0; i < c.average_thermal_num; i++) {
if (cali_info->thermal_value_avg[i]) {
thermal_value_avg += cali_info->thermal_value_avg[i];
thermal_value_avg_count++;
}
}
if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */
thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
cali_info->thermal_value_delta = thermal_value - hal_data->eeprom_thermal_meter;
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, hal_data->eeprom_thermal_meter);
}
/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
/* "delta" here is used to determine whether thermal value changes or not. */
delta = (thermal_value > cali_info->thermal_value) ? (thermal_value - cali_info->thermal_value) : (cali_info->thermal_value - thermal_value);
delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value);
delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value);
if (cali_info->thermal_value_iqk == 0xff) { /*no PG, use thermal value for IQK*/
cali_info->thermal_value_iqk = thermal_value;
delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value);
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no PG, use thermal_value for IQK\n");
}
for (p = RF_PATH_A; p < c.rf_path_count; p++)
diff_DPK[p] = (s8)thermal_value - (s8)cali_info->dpk_thermal[p];
/*4 6. If necessary, do LCK.*/
if (!(dm->support_ic_type & ODM_RTL8821)) { /*no PG, do LCK at initial status*/
if (cali_info->thermal_value_lck == 0xff) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "no PG, do LCK\n");
cali_info->thermal_value_lck = thermal_value;
/*Use RTLCK, so close power tracking driver LCK*/
if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) {
if (c.phy_lc_calibrate)
(*c.phy_lc_calibrate)(dm);
}
delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value);
}
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK);
/* Wait sacn to do LCK by RF Jenyu*/
if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
/* Delta temperature is equal to or larger than 20 centigrade.*/
if (delta_LCK >= c.threshold_iqk) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
cali_info->thermal_value_lck = thermal_value;
/*Use RTLCK, so close power tracking driver LCK*/
if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) {
if (c.phy_lc_calibrate)
(*c.phy_lc_calibrate)(dm);
}
}
}
}
/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
if (delta > 0 && cali_info->txpowertrack_control) {
/* "delta" here is used to record the absolute value of differrence. */
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
delta = thermal_value > hal_data->eeprom_thermal_meter ? (thermal_value - hal_data->eeprom_thermal_meter) : (hal_data->eeprom_thermal_meter - thermal_value);
#else
delta = (thermal_value > dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - dm->priv->pmib->dot11RFEntry.ther) : (dm->priv->pmib->dot11RFEntry.ther - thermal_value);
#endif
if (delta >= TXPWR_TRACK_TABLE_SIZE)
delta = TXPWR_TRACK_TABLE_SIZE - 1;
/*4 7.1 The Final Power index = BaseIndex + power_index_offset*/
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
if (thermal_value > hal_data->eeprom_thermal_meter) {
#else
if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) {
#endif
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/
switch (p) {
case RF_PATH_B:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]);
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_b[delta];
cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
case RF_PATH_C:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]);
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_c[delta];
cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
case RF_PATH_D:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]);
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_d[delta];
cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
default:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]);
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta];
cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
}
}
/* JJ ADD 20161014 */
if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
/*Save xtal_offset from Xtal table*/
cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]);
cali_info->xtal_offset = delta_swing_table_xtal_up[delta];
if (cali_info->xtal_offset_last == cali_info->xtal_offset)
xtal_offset_eanble = 0;
else
xtal_offset_eanble = 1;
}
} else {
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/
switch (p) {
case RF_PATH_B:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]);
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
case RF_PATH_C:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]);
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_c[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
case RF_PATH_D:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]);
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_d[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
default:
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]);
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
}
}
/* JJ ADD 20161014 */
if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
/*Save xtal_offset from Xtal table*/
cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]);
cali_info->xtal_offset = delta_swing_table_xtal_down[delta];
if (cali_info->xtal_offset_last == cali_info->xtal_offset)
xtal_offset_eanble = 0;
else
xtal_offset_eanble = 1;
}
}
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p);
if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/
cali_info->power_index_offset[p] = 0;
else
cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]);
cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p];
cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p];
cali_info->bb_swing_idx_cck = cali_info->CCK_index;
cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p];
/*************Print BB Swing base and index Offset*************/
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]);
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]);
/*4 7.1 Handle boundary conditions of index.*/
if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1)
cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1;
else if (cali_info->OFDM_index[p] <= OFDM_min_index)
cali_info->OFDM_index[p] = OFDM_min_index;
}
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"\n\n========================================================================================================\n");
if (cali_info->CCK_index > c.swing_table_size_cck - 1)
cali_info->CCK_index = c.swing_table_size_cck - 1;
else if (cali_info->CCK_index <= 0)
cali_info->CCK_index = 0;
} else {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n",
cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value);
for (p = RF_PATH_A; p < c.rf_path_count; p++)
cali_info->power_index_offset[p] = 0;
}
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n",
cali_info->CCK_index, cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n",
cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]);
}
if ((dm->support_ic_type & ODM_RTL8814A)) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "power_tracking_type=%d\n", power_tracking_type);
if (power_tracking_type == 0) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
} else if (power_tracking_type == 1) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_2G_TSSI_5G_MODE, p, 0);
} else if (power_tracking_type == 2) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_5G_TSSI_2G_MODE, p, 0);
} else if (power_tracking_type == 3) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, TSSI_MODE, p, 0);
}
cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/
} else if ((cali_info->power_index_offset[RF_PATH_A] != 0 ||
cali_info->power_index_offset[RF_PATH_B] != 0 ||
cali_info->power_index_offset[RF_PATH_C] != 0 ||
cali_info->power_index_offset[RF_PATH_D] != 0) &&
cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) {
/* 4 7.2 Configure the Swing Table to adjust Tx Power. */
cali_info->is_tx_power_changed = true; /*Always true after Tx Power is adjusted by power tracking.*/
/* */
/* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */
/* to increase TX power. Otherwise, EVM will be bad. */
/* */
/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
if (thermal_value > cali_info->thermal_value) {
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value);
}
} else if (thermal_value < cali_info->thermal_value) { /*Low temperature*/
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value);
}
}
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
if (thermal_value > hal_data->eeprom_thermal_meter)
#else
if (thermal_value > dm->priv->pmib->dot11RFEntry.ther)
#endif
{
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 ||
dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A ||
dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B ||
dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
} else {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
}
} else {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 ||
dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A ||
dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B ||
dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel);
} else {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
}
}
cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; /*Record last time Power Tracking result as base.*/
for (p = RF_PATH_A; p < c.rf_path_count; p++)
cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p];
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value);
cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/
}
if (dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n");
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
if (thermal_value > hal_data->eeprom_thermal_meter) {
#else
if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) {
#endif
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
(*c.odm_txxtaltrack_set_xtal)(dm);
} else {
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
(*c.odm_txxtaltrack_set_xtal)(dm);
}
}
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "**********End Xtal Tracking**********\n");
}
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
/* Wait sacn to do IQK by RF Jenyu*/
if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
if (!IS_HARDWARE_TYPE_8723B(adapter)) {
/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
if (delta_IQK >= c.threshold_iqk) {
cali_info->thermal_value_iqk = thermal_value;
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
if (!cali_info->is_iqk_in_progress)
(*c.do_iqk)(dm, delta_IQK, thermal_value, 8);
}
}
}
if (cali_info->dpk_thermal[RF_PATH_A] != 0) {
if (diff_DPK[RF_PATH_A] >= c.threshold_dpk) {
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk));
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
} else if ((diff_DPK[RF_PATH_A] <= -1 * c.threshold_dpk)) {
s32 value = 0x20 + (diff_DPK[RF_PATH_A] / c.threshold_dpk);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
} else {
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
}
}
if (cali_info->dpk_thermal[RF_PATH_B] != 0) {
if (diff_DPK[RF_PATH_B] >= c.threshold_dpk) {
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk));
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
} else if ((diff_DPK[RF_PATH_B] <= -1 * c.threshold_dpk)) {
s32 value = 0x20 + (diff_DPK[RF_PATH_B] / c.threshold_dpk);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
} else {
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1);
odm_set_bb_reg(dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0);
}
}
#endif
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n");
cali_info->tx_powercount = 0;
}
/* 3============================================================
* 3 IQ Calibration
* 3============================================================ */
void
odm_reset_iqk_result(
struct dm_struct *dm
)
{
return;
}
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
{
u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165
};
u8 place = chnl;
if (chnl > 14) {
for (place = 14; place < sizeof(channel_all); place++) {
if (channel_all[place] == chnl)
return place - 13;
}
}
return 0;
}
#endif
void
odm_iq_calibrate(
struct dm_struct *dm
)
{
void *adapter = dm->adapter;
struct dm_iqk_info *iqk_info = &dm->IQK_info;
RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("=>%s\n" , __FUNCTION__));
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
if (*dm->is_fcs_mode_enable)
return;
#endif
if ((dm->is_linked) && (!iqk_info->rfk_forbidden)) {
RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("interval=%d ch=%d prech=%d scan=%s\n", dm->linked_interval,
*dm->channel, dm->pre_channel, *dm->is_scan_in_process == TRUE ? "TRUE":"FALSE"));
if (*dm->channel != dm->pre_channel) {
dm->pre_channel = *dm->channel;
dm->linked_interval = 0;
}
if ((dm->linked_interval < 3) && (!*dm->is_scan_in_process))
dm->linked_interval++;
if (dm->linked_interval == 2)
PHY_IQCalibrate((PADAPTER)adapter, false);
} else
dm->linked_interval = 0;
RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("<=%s interval=%d ch=%d prech=%d scan=%s\n", __FUNCTION__, dm->linked_interval,
*dm->channel, dm->pre_channel, *dm->is_scan_in_process == TRUE?"TRUE":"FALSE"));
}
void phydm_rf_init(struct dm_struct *dm)
{
odm_txpowertracking_init(dm);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
odm_clear_txpowertracking_state(dm);
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#if (RTL8814A_SUPPORT == 1)
if (dm->support_ic_type & ODM_RTL8814A)
phy_iq_calibrate_8814a_init(dm);
#endif
#endif
}
void phydm_rf_watchdog(struct dm_struct *dm)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
odm_txpowertracking_check(dm);
if (dm->support_ic_type & ODM_IC_11AC_SERIES)
odm_iq_calibrate(dm);
#endif
}

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HAL_PHY_RF_H__
#define __HAL_PHY_RF_H__
#if (RTL8814A_SUPPORT == 1)
#if RT_PLATFORM == PLATFORM_MACOSX
#include "rtl8814a/halrf_iqk_8814a.h"
#else
#include "halrf/rtl8814a/halrf_iqk_8814a.h"
#endif
#endif
#if (RTL8822B_SUPPORT == 1)
#if RT_PLATFORM == PLATFORM_MACOSX
#include "rtl8822b/halrf_iqk_8822b.h"
#include "../../MAC/Halmac_type.h"
#else
#include "halrf/rtl8822b/halrf_iqk_8822b.h"
#include "../mac/Halmac_type.h"
#endif
#endif
#if RT_PLATFORM == PLATFORM_MACOSX
#include "halrf_powertracking_win.h"
#include "halrf_kfree.h"
#include "halrf_txgapcal.h"
#else
#include "halrf/halrf_powertracking_win.h"
#include "halrf/halrf_kfree.h"
#include "halrf/halrf_txgapcal.h"
#endif
#if (RTL8821C_SUPPORT == 1)
#if RT_PLATFORM == PLATFORM_MACOSX
#include "rtl8821c/halrf_iqk_8821c.h"
#else
#include "halrf/rtl8821c/halrf_iqk_8821c.h"
#endif
#endif
enum spur_cal_method {
PLL_RESET,
AFE_PHASE_SEL
};
enum pwrtrack_method {
BBSWING,
TXAGC,
MIX_MODE,
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE
};
typedef void(*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void(*func_iqk)(void *, u8, u8, u8);
typedef void(*func_lck)(void *);
typedef void(*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void(*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing_xtal)(void *, s8 **, s8 **);
typedef void (*func_set_xtal)(void *);
typedef void(*func_all_swing)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **);
struct txpwrtrack_cfg {
u8 swing_table_size_cck;
u8 swing_table_size_ofdm;
u8 threshold_iqk;
u8 threshold_dpk;
u8 average_thermal_num;
u8 rf_path_count;
u32 thermal_reg_addr;
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_swing_xtal get_delta_swing_xtal_table;
func_set_xtal odm_txxtaltrack_set_xtal;
func_all_swing get_delta_all_swing_table;
};
void
configure_txpower_track(
struct dm_struct *dm,
struct txpwrtrack_cfg *config
);
void
odm_clear_txpowertracking_state(
struct dm_struct *dm
);
void
odm_txpowertracking_callback_thermal_meter(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
struct dm_struct *dm
#else
void *adapter
#endif
);
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void
odm_reset_iqk_result(
struct dm_struct *dm
);
u8
odm_get_right_chnl_place_for_iqk(
u8 chnl
);
void odm_iq_calibrate(struct dm_struct *dm);
void phydm_rf_init(struct dm_struct *dm);
void phydm_rf_watchdog(struct dm_struct *dm);
#endif /* #ifndef __HAL_PHY_RF_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef _HALRF_H__
#define _HALRF_H__
/*============================================================*/
/*include files*/
/*============================================================*/
#include "halrf/halrf_psd.h"
/*============================================================*/
/*Definition */
/*============================================================*/
/*IQK version*/
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
#define IQK_VERSION_8188E "0x14"
#define IQK_VERSION_8192E "0x01"
#define IQK_VERSION_8723B "0x1e"
#define IQK_VERSION_8812A "0x01"
#define IQK_VERSION_8821A "0x01"
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
#define IQK_VERSION_8188E "0x01"
#define IQK_VERSION_8192E "0x01"
#define IQK_VERSION_8723B "0x1e"
#define IQK_VERSION_8812A "0x01"
#define IQK_VERSION_8821A "0x01"
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#define IQK_VERSION_8188E "0x01"
#define IQK_VERSION_8192E "0x01"
#define IQK_VERSION_8723B "0x1e"
#define IQK_VERSION_8812A "0x01"
#define IQK_VERSION_8821A "0x01"
#endif
#define IQK_VERSION_8814A "0x0f"
#define IQK_VERSION_8188F "0x01"
#define IQK_VERSION_8197F "0x01"
#define IQK_VERSION_8703B "0x05"
#define IQK_VERSION_8710B "0x01"
#define IQK_VERSION_8723D "0x02"
#define IQK_VERSION_8822B "0x2f"
#define IQK_VERSION_8821C "0x23"
/*LCK version*/
#define LCK_VERSION_8188E "0x01"
#define LCK_VERSION_8192E "0x01"
#define LCK_VERSION_8723B "0x01"
#define LCK_VERSION_8812A "0x01"
#define LCK_VERSION_8821A "0x01"
#define LCK_VERSION_8814A "0x01"
#define LCK_VERSION_8188F "0x01"
#define LCK_VERSION_8197F "0x01"
#define LCK_VERSION_8703B "0x01"
#define LCK_VERSION_8710B "0x01"
#define LCK_VERSION_8723D "0x01"
#define LCK_VERSION_8822B "0x01"
#define LCK_VERSION_8821C "0x01"
/*power tracking version*/
#define POWERTRACKING_VERSION_8188E "0x01"
#define POWERTRACKING_VERSION_8192E "0x01"
#define POWERTRACKING_VERSION_8723B "0x01"
#define POWERTRACKING_VERSION_8812A "0x01"
#define POWERTRACKING_VERSION_8821A "0x01"
#define POWERTRACKING_VERSION_8814A "0x01"
#define POWERTRACKING_VERSION_8188F "0x01"
#define POWERTRACKING_VERSION_8197F "0x01"
#define POWERTRACKING_VERSION_8703B "0x01"
#define POWERTRACKING_VERSION_8710B "0x01"
#define POWERTRACKING_VERSION_8723D "0x01"
#define POWERTRACKING_VERSION_8822B "0x01"
#define POWERTRACKING_VERSION_8821C "0x01"
/*DPK tracking version*/
#define DPK_VERSION_8188E "NONE"
#define DPK_VERSION_8192E "NONE"
#define DPK_VERSION_8723B "NONE"
#define DPK_VERSION_8812A "NONE"
#define DPK_VERSION_8821A "NONE"
#define DPK_VERSION_8814A "NONE"
#define DPK_VERSION_8188F "NONE"
#define DPK_VERSION_8197F "NONE"
#define DPK_VERSION_8703B "NONE"
#define DPK_VERSION_8710B "NONE"
#define DPK_VERSION_8723D "NONE"
#define DPK_VERSION_8822B "NONE"
#define DPK_VERSION_8821C "NONE"
/*Kfree tracking version*/
#define KFREE_VERSION_8188E (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8192E (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8723B (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8812A (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8821A (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8814A (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8188F (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8197F (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8703B (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8710B (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8723D (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8822B (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
#define KFREE_VERSION_8821C (dm->power_trim_data.flag & KFREE_FLAG_ON)? "0x01" : "NONE"
/*PA Bias Calibration version*/
#define PABIASK_VERSION_8188E (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8192E (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8723B (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8812A (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8821A (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8814A (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8188F (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8197F (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8703B (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8710B (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8723D (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8822B (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define PABIASK_VERSION_8821C (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON)? "0x01" : "NONE"
#define HALRF_IQK_VER (dm->support_ic_type == ODM_RTL8188E)? IQK_VERSION_8188E :\
(dm->support_ic_type == ODM_RTL8192E)? IQK_VERSION_8192E :\
(dm->support_ic_type == ODM_RTL8723B)? IQK_VERSION_8723B :\
(dm->support_ic_type == ODM_RTL8812)? IQK_VERSION_8812A :\
(dm->support_ic_type == ODM_RTL8821)? IQK_VERSION_8821A :\
(dm->support_ic_type == ODM_RTL8814A)? IQK_VERSION_8814A :\
(dm->support_ic_type == ODM_RTL8188F)? IQK_VERSION_8188F :\
(dm->support_ic_type == ODM_RTL8197F)? IQK_VERSION_8197F :\
(dm->support_ic_type == ODM_RTL8703B)? IQK_VERSION_8703B :\
(dm->support_ic_type == ODM_RTL8710B)? IQK_VERSION_8710B :\
(dm->support_ic_type == ODM_RTL8723D)? IQK_VERSION_8723D :\
(dm->support_ic_type == ODM_RTL8822B)? IQK_VERSION_8822B :\
(dm->support_ic_type == ODM_RTL8821C)? IQK_VERSION_8821C :"unknown"
#define HALRF_LCK_VER (dm->support_ic_type == ODM_RTL8188E)? LCK_VERSION_8188E :\
(dm->support_ic_type == ODM_RTL8192E)? LCK_VERSION_8192E :\
(dm->support_ic_type == ODM_RTL8723B)? LCK_VERSION_8723B :\
(dm->support_ic_type == ODM_RTL8812)? LCK_VERSION_8812A :\
(dm->support_ic_type == ODM_RTL8821)? LCK_VERSION_8821A :\
(dm->support_ic_type == ODM_RTL8814A)? LCK_VERSION_8814A :\
(dm->support_ic_type == ODM_RTL8188F)? LCK_VERSION_8188F :\
(dm->support_ic_type == ODM_RTL8197F)? LCK_VERSION_8197F :\
(dm->support_ic_type == ODM_RTL8703B)? LCK_VERSION_8703B :\
(dm->support_ic_type == ODM_RTL8710B)? LCK_VERSION_8710B :\
(dm->support_ic_type == ODM_RTL8723D)? LCK_VERSION_8723D :\
(dm->support_ic_type == ODM_RTL8822B)? LCK_VERSION_8822B :\
(dm->support_ic_type == ODM_RTL8821C)? LCK_VERSION_8821C :"unknown"
#define HALRF_POWRTRACKING_VER (dm->support_ic_type == ODM_RTL8188E)? POWERTRACKING_VERSION_8188E :\
(dm->support_ic_type == ODM_RTL8192E)? POWERTRACKING_VERSION_8192E :\
(dm->support_ic_type == ODM_RTL8723B)? POWERTRACKING_VERSION_8723B :\
(dm->support_ic_type == ODM_RTL8812)? POWERTRACKING_VERSION_8812A :\
(dm->support_ic_type == ODM_RTL8821)? POWERTRACKING_VERSION_8821A :\
(dm->support_ic_type == ODM_RTL8814A)? POWERTRACKING_VERSION_8814A :\
(dm->support_ic_type == ODM_RTL8188F)? POWERTRACKING_VERSION_8188F :\
(dm->support_ic_type == ODM_RTL8197F)? POWERTRACKING_VERSION_8197F :\
(dm->support_ic_type == ODM_RTL8703B)? POWERTRACKING_VERSION_8703B :\
(dm->support_ic_type == ODM_RTL8710B)? POWERTRACKING_VERSION_8710B :\
(dm->support_ic_type == ODM_RTL8723D)? POWERTRACKING_VERSION_8723D :\
(dm->support_ic_type == ODM_RTL8822B)? POWERTRACKING_VERSION_8822B :\
(dm->support_ic_type == ODM_RTL8821C)? POWERTRACKING_VERSION_8821C :"unknown"
#define HALRF_DPK_VER (dm->support_ic_type == ODM_RTL8188E)? DPK_VERSION_8188E :\
(dm->support_ic_type == ODM_RTL8192E)? DPK_VERSION_8192E :\
(dm->support_ic_type == ODM_RTL8723B)? DPK_VERSION_8723B :\
(dm->support_ic_type == ODM_RTL8812)? DPK_VERSION_8812A :\
(dm->support_ic_type == ODM_RTL8821)? DPK_VERSION_8821A :\
(dm->support_ic_type == ODM_RTL8814A)? DPK_VERSION_8814A :\
(dm->support_ic_type == ODM_RTL8188F)? DPK_VERSION_8188F :\
(dm->support_ic_type == ODM_RTL8197F)? DPK_VERSION_8197F :\
(dm->support_ic_type == ODM_RTL8703B)? DPK_VERSION_8703B :\
(dm->support_ic_type == ODM_RTL8710B)? DPK_VERSION_8710B :\
(dm->support_ic_type == ODM_RTL8723D)? DPK_VERSION_8723D :\
(dm->support_ic_type == ODM_RTL8822B)? DPK_VERSION_8822B :\
(dm->support_ic_type == ODM_RTL8821C)? DPK_VERSION_8821C :"unknown"
#define HALRF_KFREE_VER (dm->support_ic_type == ODM_RTL8188E)? KFREE_VERSION_8188E :\
(dm->support_ic_type == ODM_RTL8192E)? KFREE_VERSION_8192E :\
(dm->support_ic_type == ODM_RTL8723B)? KFREE_VERSION_8723B :\
(dm->support_ic_type == ODM_RTL8812)? KFREE_VERSION_8812A :\
(dm->support_ic_type == ODM_RTL8821)? KFREE_VERSION_8821A :\
(dm->support_ic_type == ODM_RTL8814A)? KFREE_VERSION_8814A :\
(dm->support_ic_type == ODM_RTL8188F)? KFREE_VERSION_8188F :\
(dm->support_ic_type == ODM_RTL8197F)? KFREE_VERSION_8197F :\
(dm->support_ic_type == ODM_RTL8703B)? KFREE_VERSION_8703B :\
(dm->support_ic_type == ODM_RTL8710B)? KFREE_VERSION_8710B :\
(dm->support_ic_type == ODM_RTL8723D)? KFREE_VERSION_8723D :\
(dm->support_ic_type == ODM_RTL8822B)? KFREE_VERSION_8822B :\
(dm->support_ic_type == ODM_RTL8821C)? KFREE_VERSION_8821C :"unknown"
#define HALRF_PABIASK_VER (dm->support_ic_type == ODM_RTL8188E)? PABIASK_VERSION_8188E :\
(dm->support_ic_type == ODM_RTL8192E)? PABIASK_VERSION_8192E :\
(dm->support_ic_type == ODM_RTL8723B)? PABIASK_VERSION_8723B :\
(dm->support_ic_type == ODM_RTL8812)? PABIASK_VERSION_8812A :\
(dm->support_ic_type == ODM_RTL8821)? PABIASK_VERSION_8821A :\
(dm->support_ic_type == ODM_RTL8814A)? PABIASK_VERSION_8814A :\
(dm->support_ic_type == ODM_RTL8188F)? PABIASK_VERSION_8188F :\
(dm->support_ic_type == ODM_RTL8197F)? PABIASK_VERSION_8197F :\
(dm->support_ic_type == ODM_RTL8703B)? PABIASK_VERSION_8703B :\
(dm->support_ic_type == ODM_RTL8710B)? PABIASK_VERSION_8710B :\
(dm->support_ic_type == ODM_RTL8723D)? PABIASK_VERSION_8723D :\
(dm->support_ic_type == ODM_RTL8822B)? PABIASK_VERSION_8822B :\
(dm->support_ic_type == ODM_RTL8821C)? PABIASK_VERSION_8821C :"unknown"
#define IQK_THRESHOLD 8
#define DPK_THRESHOLD 4
/*===========================================================*/
/*AGC RX High Power mode*/
/*===========================================================*/
#define lna_low_gain_1 0x64
#define lna_low_gain_2 0x5A
#define lna_low_gain_3 0x58
/*============================================================*/
/* enumeration */
/*============================================================*/
enum halrf_ability {
HAL_RF_TX_PWR_TRACK = BIT(0),
HAL_RF_IQK = BIT(1),
HAL_RF_LCK = BIT(2),
HAL_RF_DPK = BIT(3),
HAL_RF_TXGAPK = BIT(4)
};
enum halrf_cmninfo_init {
HALRF_CMNINFO_ABILITY = 0,
HALRF_CMNINFO_DPK_EN = 1,
HALRF_CMNINFO_EEPROM_THERMAL_VALUE,
HALRF_CMNINFO_FW_VER,
HALRF_CMNINFO_RFK_FORBIDDEN,
HALRF_CMNINFO_IQK_SEGMENT,
HALRF_CMNINFO_RATE_INDEX,
HALRF_CMNINFO_MP_PSD_POINT,
HALRF_CMNINFO_MP_PSD_START_POINT,
HALRF_CMNINFO_MP_PSD_STOP_POINT,
HALRF_CMNINFO_MP_PSD_AVERAGE
};
enum halrf_cmninfo_hook {
HALRF_CMNINFO_CON_TX,
HALRF_CMNINFO_SINGLE_TONE,
HALRF_CMNINFO_CARRIER_SUPPRESSION,
HALRF_CMNINFO_MP_RATE_INDEX
};
enum phydm_lna_set {
phydm_lna_disable = 0,
phydm_lna_enable = 1,
};
/*============================================================*/
/* structure */
/*============================================================*/
struct _hal_rf_ {
/*hook*/
u8 *test1;
/*update*/
u32 rf_supportability;
u8 eeprom_thermal;
u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/
boolean dpk_done;
u32 fw_ver;
boolean *is_con_tx;
boolean *is_single_tone;
boolean *is_carrier_suppresion;
u8 *mp_rate_index;
u32 p_rate_index;
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
struct _halrf_psd_data halrf_psd_data;
#endif
};
/*============================================================*/
/* function prototype */
/*============================================================*/
void halrf_basic_profile(
void *dm_void,
u32 *_used,
char *output,
u32 *_out_len
);
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
void halrf_iqk_info_dump(
void *dm_void,
u32 *_used,
char *output,
u32 *_out_len
);
void
halrf_iqk_hwtx_check(
void *dm_void,
boolean is_check
);
#endif
u8
halrf_match_iqk_version(
void *dm_void
);
void
halrf_support_ability_debug(
void *dm_void,
char input[][16],
u32 *_used,
char *output,
u32 *_out_len
);
void
halrf_cmn_info_init(
void *dm_void,
enum halrf_cmninfo_init cmn_info,
u32 value
);
void
halrf_cmn_info_hook(
void *dm_void,
u32 cmn_info,
void *value
);
void
halrf_cmn_info_set(
void *dm_void,
u32 cmn_info,
u64 value
);
u64
halrf_cmn_info_get(
void *dm_void,
u32 cmn_info
);
void
halrf_watchdog(
void *dm_void
);
void
halrf_supportability_init(
void *dm_void
);
void
halrf_init(
void *dm_void
);
void
halrf_iqk_trigger(
void *dm_void,
boolean is_recovery
);
void
halrf_segment_iqk_trigger(
void *dm_void,
boolean clear,
boolean segment_iqk
);
void
halrf_lck_trigger(
void *dm_void
);
void
halrf_iqk_debug(
void *dm_void,
u32 *const dm_value,
u32 *_used,
char *output,
u32 *_out_len
);
void
phydm_get_iqk_cfir(
void *dm_void,
u8 idx,
u8 path,
boolean debug
);
void
halrf_iqk_xym_read(
void *dm_void,
u8 path,
u8 xym_type
);
void
halrf_rf_lna_setting(
void *dm_void,
enum phydm_lna_set type
);
void
halrf_do_imr_test(
void *dm_void,
u8 data
);
u32
halrf_psd_log2base(
u32 val
);
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
void halrf_iqk_dbg(void *dm_void);
#endif
#endif

43
hal/phydm/halrf/halrf_features.h Normal file
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@@ -0,0 +1,43 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_FEATURES_H__
#define __HALRF_FEATURES
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define CONFIG_HALRF_POWERTRACKING 1
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
#define CONFIG_HALRF_POWERTRACKING 1
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#define CONFIG_HALRF_POWERTRACKING 1
#endif
#endif

85
hal/phydm/halrf/halrf_iqk.h Normal file
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@@ -0,0 +1,85 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __PHYDMIQK_H__
#define __PHYDMIQK_H__
/*--------------------------Define Parameters-------------------------------*/
#define LOK_delay 1
#define WBIQK_delay 10
#define TX_IQK 0
#define RX_IQK 1
#define TXIQK 0
#define RXIQK1 1
#define RXIQK2 2
#define kcount_limit_80m 2
#define kcount_limit_others 4
#define rxiqk_gs_limit 10
#define NUM 4
/*---------------------------End Define Parameters-------------------------------*/
struct dm_iqk_info {
boolean lok_fail[NUM];
boolean iqk_fail[2][NUM];
u32 iqc_matrix[2][NUM];
u8 iqk_times;
u32 rf_reg18;
u32 lna_idx;
u8 rxiqk_step;
u8 tmp1bcc;
u8 kcount;
u8 rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/
boolean rfk_forbidden;
#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
u32 iqk_channel[2];
boolean iqk_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */
u32 iqk_cfir_real[3][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_real*/ /*channel index = 2 is just for debug*/
u32 iqk_cfir_imag[3][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ /*channel index = 2 is just for debug*/
u8 retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */
u8 gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */
u8 rxiqk_fail_code[2][4]; /* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */
u32 lok_idac[2][4]; /*channel / path*/
u16 rxiqk_agc[2][4]; /*channel / path*/
u32 bypass_iqk[2][4]; /*channel / 0xc94/0xe94*/
u32 txgap_result[8]; /*txagpK result */
u32 tmp_gntwl;
boolean is_btg;
boolean isbnd;
boolean is_reload;
boolean segment_iqk;
boolean is_hwtx;
boolean xym_read;
boolean trximr_enable;
u32 rx_xym[2][10];
u32 tx_xym[2][10];
u32 gs1_xym[2][6];
u32 gs2_xym[2][6];
u32 rxk1_xym[2][6];
#endif
};
#endif

883
hal/phydm/halrf/halrf_kfree.c Normal file
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@@ -0,0 +1,883 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
/*============================================================*/
/*include files*/
/*============================================================*/
#include "mp_precomp.h"
#include "phydm_precomp.h"
/*<YuChen, 150720> Add for KFree Feature Requested by RF David.*/
/*This is a phydm API*/
void
phydm_set_kfree_to_rf_8814a(
void *dm_void,
u8 e_rf_path,
u8 data
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
boolean is_odd;
if ((data % 2) != 0) { /*odd->positive*/
data = data - 1;
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 1);
is_odd = true;
} else { /*even->negative*/
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 0);
is_odd = false;
}
PHYDM_DBG(dm, ODM_COMP_MP, "phy_ConfigKFree8814A(): RF_0x55[19]= %d\n", is_odd);
switch (data) {
case 0:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0);
cali_info->kfree_offset[e_rf_path] = 0;
break;
case 2:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0);
cali_info->kfree_offset[e_rf_path] = 0;
break;
case 4:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1);
cali_info->kfree_offset[e_rf_path] = 1;
break;
case 6:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1);
cali_info->kfree_offset[e_rf_path] = 1;
break;
case 8:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2);
cali_info->kfree_offset[e_rf_path] = 2;
break;
case 10:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2);
cali_info->kfree_offset[e_rf_path] = 2;
break;
case 12:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3);
cali_info->kfree_offset[e_rf_path] = 3;
break;
case 14:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3);
cali_info->kfree_offset[e_rf_path] = 3;
break;
case 16:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4);
cali_info->kfree_offset[e_rf_path] = 4;
break;
case 18:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4);
cali_info->kfree_offset[e_rf_path] = 4;
break;
case 20:
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
odm_set_rf_reg(dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 5);
cali_info->kfree_offset[e_rf_path] = 5;
break;
default:
break;
}
if (is_odd == false) {
/*that means Kfree offset is negative, we need to record it.*/
cali_info->kfree_offset[e_rf_path] = (-1) * cali_info->kfree_offset[e_rf_path];
PHYDM_DBG(dm, ODM_COMP_MP, "phy_ConfigKFree8814A(): kfree_offset = %d\n", cali_info->kfree_offset[e_rf_path]);
} else
PHYDM_DBG(dm, ODM_COMP_MP, "phy_ConfigKFree8814A(): kfree_offset = %d\n", cali_info->kfree_offset[e_rf_path]);
}
//
//
//
void
phydm_get_thermal_trim_offset_8821c(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
u8 pg_therm = 0xff;
odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_8821C, &pg_therm, false);
if (pg_therm != 0xff) {
pg_therm = pg_therm & 0x1f;
if ((pg_therm & BIT(0)) == 0)
power_trim_info->thermal = (-1 * (pg_therm >> 1));
else
power_trim_info->thermal = (pg_therm >> 1);
power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
}
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8821c thermal trim flag:0x%02x\n", power_trim_info->flag);
if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8821c thermal:%d\n", power_trim_info->thermal);
}
void
phydm_get_power_trim_offset_8821c(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
u8 pg_power = 0xff, i;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_2G_TXAB_OFFSET_8821C, &pg_power, false);
if (pg_power != 0xff) {
power_trim_info->bb_gain[0][0] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL1_TXA_OFFSET_8821C, &pg_power, false);
power_trim_info->bb_gain[1][0] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL2_TXA_OFFSET_8821C, &pg_power, false);
power_trim_info->bb_gain[2][0] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM1_TXA_OFFSET_8821C, &pg_power, false);
power_trim_info->bb_gain[3][0] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM2_TXA_OFFSET_8821C, &pg_power, false);
power_trim_info->bb_gain[4][0] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GH1_TXA_OFFSET_8821C, &pg_power, false);
power_trim_info->bb_gain[5][0] = pg_power;
power_trim_info->flag = power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G | KFREE_FLAG_ON_5G;
}
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8821c power trim flag:0x%02x\n", power_trim_info->flag);
if (power_trim_info->flag & KFREE_FLAG_ON) {
for (i = 0; i < KFREE_BAND_NUM; i++)
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8821c power_trim_data->bb_gain[%d][0]=0x%X\n", i, power_trim_info->bb_gain[i][0]);
}
}
void
phydm_set_kfree_to_rf_8821c(
void *dm_void,
u8 e_rf_path,
boolean wlg_btg,
u8 data
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
u8 wlg, btg;
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 1);
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(5), 1);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(6), 1);
odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(6), 1);
if (wlg_btg == true) {
wlg = data & 0xf;
btg = (data & 0xf0) >> 4;
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (wlg & BIT(0)));
odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (wlg >> 1));
odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(19), (btg & BIT(0)));
odm_set_rf_reg(dm, e_rf_path, 0x65, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (btg >> 1));
} else {
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
}
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n",
odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
odm_get_rf_reg(dm, e_rf_path, 0x65, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)))
);
}
void
phydm_clear_kfree_to_rf_8821c(
void *dm_void,
u8 e_rf_path,
u8 data
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 1);
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(5), 1);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(6), 1);
odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(6), 1);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (data >> 1));
odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(19), (data & BIT(0)));
odm_set_rf_reg(dm, e_rf_path, 0x65, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (data >> 1));
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 0);
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(5), 0);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(6), 0);
odm_set_rf_reg(dm, e_rf_path, 0x65, BIT(6), 0);
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n",
odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
odm_get_rf_reg(dm, e_rf_path, 0x65, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)))
);
}
void
phydm_get_thermal_trim_offset_8822b(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
u8 pg_therm = 0xff;
#if 0
u32 thermal_trim_enable = 0xff;
odm_efuse_logical_map_read(dm, 1, 0xc8, &thermal_trim_enable);
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 0xc8:0x%2x\n", thermal_trim_enable);
thermal_trim_enable = (thermal_trim_enable & BIT(5)) >> 5;
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b thermal trim Enable:%d\n", thermal_trim_enable);
if ((cali_info->reg_rf_kfree_enable == 0 && thermal_trim_enable == 1) ||
cali_info->reg_rf_kfree_enable == 1) {
#endif
odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET, &pg_therm, false);
if (pg_therm != 0xff) {
pg_therm = pg_therm & 0x1f;
if ((pg_therm & BIT(0)) == 0)
power_trim_info->thermal = (-1 * (pg_therm >> 1));
else
power_trim_info->thermal = (pg_therm >> 1);
power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
}
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b thermal trim flag:0x%02x\n", power_trim_info->flag);
if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b thermal:%d\n", power_trim_info->thermal);
#if 0
} else
return;
#endif
}
void
phydm_get_power_trim_offset_8822b(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
u8 pg_power = 0xff, i, j;
#if 0
u32 power_trim_enable = 0xff;
odm_efuse_logical_map_read(dm, 1, 0xc8, &power_trim_enable);
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 0xc8:0x%2x\n", power_trim_enable);
power_trim_enable = (power_trim_enable & BIT(4)) >> 4;
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b power trim Enable:%d\n", power_trim_enable);
if ((cali_info->reg_rf_kfree_enable == 0 && power_trim_enable == 1) ||
cali_info->reg_rf_kfree_enable == 1) {
#endif
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false);
if (pg_power != 0xff) {
/*Path A*/
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false);
power_trim_info->bb_gain[0][0] = (pg_power & 0xf);
/*Path B*/
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false);
power_trim_info->bb_gain[0][1] = ((pg_power & 0xf0) >> 4);
power_trim_info->flag |= KFREE_FLAG_ON_2G;
power_trim_info->flag |= KFREE_FLAG_ON;
}
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL1_TXA_OFFSET, &pg_power, false);
if (pg_power != 0xff) {
/*Path A*/
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL1_TXA_OFFSET, &pg_power, false);
power_trim_info->bb_gain[1][0] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL2_TXA_OFFSET, &pg_power, false);
power_trim_info->bb_gain[2][0] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM1_TXA_OFFSET, &pg_power, false);
power_trim_info->bb_gain[3][0] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM2_TXA_OFFSET, &pg_power, false);
power_trim_info->bb_gain[4][0] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GH1_TXA_OFFSET, &pg_power, false);
power_trim_info->bb_gain[5][0] = pg_power;
/*Path B*/
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL1_TXB_OFFSET, &pg_power, false);
power_trim_info->bb_gain[1][1] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GL2_TXB_OFFSET, &pg_power, false);
power_trim_info->bb_gain[2][1] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM1_TXB_OFFSET, &pg_power, false);
power_trim_info->bb_gain[3][1] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GM2_TXB_OFFSET, &pg_power, false);
power_trim_info->bb_gain[4][1] = pg_power;
odm_efuse_one_byte_read(dm, PPG_BB_GAIN_5GH1_TXB_OFFSET, &pg_power, false);
power_trim_info->bb_gain[5][1] = pg_power;
power_trim_info->flag |= KFREE_FLAG_ON_5G;
power_trim_info->flag |= KFREE_FLAG_ON;
}
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b power trim flag:0x%02x\n", power_trim_info->flag);
if (!(power_trim_info->flag & KFREE_FLAG_ON))
return;
for (i = 0; i < KFREE_BAND_NUM; i++) {
for (j = 0; j < 2; j++)
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b power_trim_data->bb_gain[%d][%d]=0x%X\n", i, j, power_trim_info->bb_gain[i][j]);
}
#if 0
} else
return;
#endif
}
void
phydm_set_pa_bias_to_rf_8822b(
void *dm_void,
u8 e_rf_path,
s8 tx_pa_bias
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
u32 rf_reg_51 = 0, rf_reg_52 = 0, rf_reg_3f = 0;
rf_reg_51 = odm_get_rf_reg(dm, e_rf_path, 0x51, RFREGOFFSETMASK);
rf_reg_52 = odm_get_rf_reg(dm, e_rf_path, 0x52, RFREGOFFSETMASK);
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 2g rf(0x51)=0x%X rf(0x52)=0x%X path=%d\n",
rf_reg_51, rf_reg_52, e_rf_path);
/*rf3f => rf52[19:17] = rf3f[2:0] rf52[16:15] = rf3f[4:3] rf52[3:0] = rf3f[8:5]*/
/*rf3f => rf51[6:3] = rf3f[12:9] rf52[13] = rf3f[13]*/
rf_reg_3f = ((rf_reg_52 & 0xe0000) >> 17) |
(((rf_reg_52 & 0x18000) >> 15) << 3) |
((rf_reg_52 & 0xf) << 5) |
(((rf_reg_51 & 0x78) >> 3) << 9) |
(((rf_reg_52 & 0x2000) >> 13) << 13);
PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b 2g original tx_pa_bias=%d rf_reg_3f=0x%X path=%d\n",
tx_pa_bias, rf_reg_3f, e_rf_path);
tx_pa_bias = (s8)((rf_reg_3f & (BIT(12) | BIT(11) | BIT(10) | BIT(9))) >> 9) + tx_pa_bias;
if (tx_pa_bias < 0)
tx_pa_bias = 0;
else if (tx_pa_bias > 7)
tx_pa_bias = 7;
rf_reg_3f = ((rf_reg_3f & 0xfe1ff) | (tx_pa_bias << 9));
PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b 2g offset efuse 0x3d5 0x3d6 tx_pa_bias=%d rf_reg_3f=0x%X path=%d\n",
tx_pa_bias, rf_reg_3f, e_rf_path);
odm_set_rf_reg(dm, e_rf_path, 0xef, BIT(10), 0x1);
odm_set_rf_reg(dm, e_rf_path, 0x33, RFREGOFFSETMASK, 0x0);
odm_set_rf_reg(dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f);
odm_set_rf_reg(dm, e_rf_path, 0x33, BIT(0), 0x1);
odm_set_rf_reg(dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f);
odm_set_rf_reg(dm, e_rf_path, 0x33, BIT(1), 0x1);
odm_set_rf_reg(dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f);
odm_set_rf_reg(dm, e_rf_path, 0x33, (BIT(1) | BIT(0)), 0x3);
odm_set_rf_reg(dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f);
odm_set_rf_reg(dm, e_rf_path, 0xef, BIT(10), 0x0);
PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b 2g tx pa bias rf_0x3f(0x%X) path=%d\n",
odm_get_rf_reg(dm, e_rf_path, 0x3f, (BIT(12) | BIT(11) | BIT(10) | BIT(9))), e_rf_path);
}
void
phydm_get_pa_bias_offset_8822b(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
u8 pg_pa_bias = 0xff, e_rf_path = 0;
s8 tx_pa_bias[2] = {0};
odm_efuse_one_byte_read(dm, PPG_PA_BIAS_2G_TXA_OFFSET, &pg_pa_bias, false);
if (pg_pa_bias != 0xff) {
/*paht a*/
odm_efuse_one_byte_read(dm, PPG_PA_BIAS_2G_TXA_OFFSET, &pg_pa_bias, false);
pg_pa_bias = pg_pa_bias & 0xf;
if ((pg_pa_bias & BIT(0)) == 0)
tx_pa_bias[0] = (-1 * (pg_pa_bias >> 1));
else
tx_pa_bias[0] = (pg_pa_bias >> 1);
/*paht b*/
odm_efuse_one_byte_read(dm, PPG_PA_BIAS_2G_TXB_OFFSET, &pg_pa_bias, false);
pg_pa_bias = pg_pa_bias & 0xf;
if ((pg_pa_bias & BIT(0)) == 0)
tx_pa_bias[1] = (-1 * (pg_pa_bias >> 1));
else
tx_pa_bias[1] = (pg_pa_bias >> 1);
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 2g tx_patha_pa_bias:%d tx_pathb_pa_bias:%d\n", tx_pa_bias[0], tx_pa_bias[1]);
for (e_rf_path = RF_PATH_A; e_rf_path < 2; e_rf_path++)
phydm_set_pa_bias_to_rf_8822b(dm, e_rf_path, tx_pa_bias[e_rf_path]);
power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON;
}
else
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] 8822b 2g tx pa bias no pg\n");
}
void
phydm_set_kfree_to_rf_8822b(
void *dm_void,
u8 e_rf_path,
u8 data
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 1);
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(4), 1);
odm_set_rf_reg(dm, e_rf_path, 0x65, MASKLWORD, 0x9000);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(5), 1);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b 0x55[19:14]=0x%X path=%d\n",
odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
e_rf_path
);
}
void
phydm_clear_kfree_to_rf_8822b(
void *dm_void,
u8 e_rf_path,
u8 data
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 1);
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(4), 1);
odm_set_rf_reg(dm, e_rf_path, 0x65, MASKLWORD, 0x9000);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(5), 1);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(0), 0);
odm_set_rf_reg(dm, e_rf_path, 0xde, BIT(4), 1);
odm_set_rf_reg(dm, e_rf_path, 0x65, MASKLWORD, 0x9000);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(5), 0);
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(7), 0);
PHYDM_DBG(dm, ODM_COMP_MP,"[kfree] 8822b clear power trim 0x55[19:14]=0x%X path=%d\n",
odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
e_rf_path
);
}
void
phydm_get_thermal_trim_offset_8710b(
void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct odm_power_trim_data *power_trim_info = &(dm->power_trim_data);
u8 pg_therm = 0xff;
odm_efuse_one_byte_read(dm, 0x0EF, &pg_therm, false);
if (pg_therm != 0xff) {
pg_therm = pg_therm & 0x1f;
if ((pg_therm & BIT(0)) == 0)
power_trim_info->thermal = (-1 * (pg_therm >> 1));
else
power_trim_info->thermal = (pg_therm >> 1);
power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
}
ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b thermal trim flag:0x%02x\n", power_trim_info->flag));
if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b thermal:%d\n", power_trim_info->thermal));
}
void
phydm_get_power_trim_offset_8710b(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct odm_power_trim_data *power_trim_info = &(dm->power_trim_data);
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
u8 pg_power = 0xff;
odm_efuse_one_byte_read(dm, 0xEE, &pg_power, false);
if (pg_power != 0xff) {
/*Path A*/
odm_efuse_one_byte_read(dm, 0xEE, &pg_power, false);
power_trim_info->bb_gain[0][0] = (pg_power & 0xf);
power_trim_info->flag |= KFREE_FLAG_ON_2G;
power_trim_info->flag |= KFREE_FLAG_ON;
}
ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b power trim flag:0x%02x\n", power_trim_info->flag));
if (power_trim_info->flag & KFREE_FLAG_ON)
ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b power_trim_data->bb_gain[0][0]=0x%X\n", power_trim_info->bb_gain[0][0]));
}
void
phydm_set_kfree_to_rf_8710b(
void *dm_void,
u8 e_rf_path,
u8 data
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15)), ((data & 0xf) >> 1));
ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD,
("[kfree] 8710b 0x55[19:14]=0x%X path=%d\n",
odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
e_rf_path
));
}
void
phydm_clear_kfree_to_rf_8710b(
void *dm_void,
u8 e_rf_path,
u8 data
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
odm_set_rf_reg(dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
odm_set_rf_reg(dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD,
("[kfree] 8710b clear power trim 0x55[19:14]=0x%X path=%d\n",
odm_get_rf_reg(dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
e_rf_path
));
}
void
phydm_set_kfree_to_rf(
void *dm_void,
u8 e_rf_path,
u8 data
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
if (dm->support_ic_type & ODM_RTL8814A)
phydm_set_kfree_to_rf_8814a(dm, e_rf_path, data);
if ((dm->support_ic_type & ODM_RTL8821C) && (*dm->band_type == ODM_BAND_2_4G))
phydm_set_kfree_to_rf_8821c(dm, e_rf_path, true, data);
else if (dm->support_ic_type & ODM_RTL8821C)
phydm_set_kfree_to_rf_8821c(dm, e_rf_path, false, data);
if (dm->support_ic_type & ODM_RTL8822B)
phydm_set_kfree_to_rf_8822b(dm, e_rf_path, data);
if (dm->support_ic_type & ODM_RTL8710B)
phydm_set_kfree_to_rf_8710b(dm, e_rf_path, data);
}
void
phydm_clear_kfree_to_rf(
void *dm_void,
u8 e_rf_path,
u8 data
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
if (dm->support_ic_type & ODM_RTL8822B)
phydm_clear_kfree_to_rf_8822b(dm, e_rf_path, 1);
if (dm->support_ic_type & ODM_RTL8821C)
phydm_clear_kfree_to_rf_8821c(dm, e_rf_path, 1);
if (dm->support_ic_type & ODM_RTL8710B)
phydm_set_kfree_to_rf_8710b(dm, e_rf_path, data);
}
void
phydm_get_thermal_trim_offset(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal;
u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO((PADAPTER)adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] dump efuse fail !!!\n");
#endif
if (dm->support_ic_type & ODM_RTL8821C)
phydm_get_thermal_trim_offset_8821c(dm_void);
else if (dm->support_ic_type & ODM_RTL8822B)
phydm_get_thermal_trim_offset_8822b(dm_void);
else if (dm->support_ic_type & ODM_RTL8710B)
phydm_get_thermal_trim_offset_8710b(dm_void);
}
void
phydm_get_power_trim_offset(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if 0 //(DM_ODM_SUPPORT_TYPE & ODM_WIN) // 2017 MH DM Should use the same code.s
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal;
u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO(adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] dump efuse fail !!!\n");
#endif
if (dm->support_ic_type & ODM_RTL8821C)
phydm_get_power_trim_offset_8821c(dm_void);
else if (dm->support_ic_type & ODM_RTL8822B)
phydm_get_power_trim_offset_8822b(dm_void);
else if (dm->support_ic_type & ODM_RTL8710B)
phydm_get_power_trim_offset_8710b(dm_void);
}
void
phydm_get_pa_bias_offset(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal;
u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO((PADAPTER)adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] dump efuse fail !!!\n");
#endif
if (dm->support_ic_type & ODM_RTL8822B)
phydm_get_pa_bias_offset_8822b(dm_void);
}
s8
phydm_get_thermal_offset(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
return power_trim_info->thermal;
else
return 0;
}
void
phydm_config_kfree(
void *dm_void,
u8 channel_to_sw
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
u8 rfpath = 0, max_rf_path = 0;
u8 channel_idx = 0, i, j;
if (dm->support_ic_type & ODM_RTL8814A)
max_rf_path = 4; /*0~3*/
else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E | ODM_RTL8822B))
max_rf_path = 2; /*0~1*/
else if (dm->support_ic_type & (ODM_RTL8821C| ODM_RTL8710B))
max_rf_path = 1;
PHYDM_DBG(dm, ODM_COMP_MP, "===>[kfree] phy_ConfigKFree()\n");
if (cali_info->reg_rf_kfree_enable == 2) {
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phy_ConfigKFree(): reg_rf_kfree_enable == 2, Disable\n");
return;
} else if (cali_info->reg_rf_kfree_enable == 1 || cali_info->reg_rf_kfree_enable == 0) {
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phy_ConfigKFree(): reg_rf_kfree_enable == true\n");
/*Make sure the targetval is defined*/
if (!(power_trim_info->flag & KFREE_FLAG_ON)) {
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phy_ConfigKFree(): targetval not defined, Don't execute KFree Process.\n");
return;
}
/*if kfree_table[0] == 0xff, means no Kfree*/
if (dm->support_ic_type &ODM_RTL8710B)
ODM_RT_TRACE(dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] power_trim_data->bb_gain[0][0]=0x%X\n", power_trim_info->bb_gain[0][0]));
else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E | ODM_RTL8822B |ODM_RTL8821C | ODM_RTL8814A)){
for (i = 0; i < KFREE_BAND_NUM; i++) {
for (j = 0; j < max_rf_path; j++)
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] power_trim_data->bb_gain[%d][%d]=0x%X\n", i, j, power_trim_info->bb_gain[i][j]);
}
}
if (*dm->band_type == ODM_BAND_2_4G && power_trim_info->flag & KFREE_FLAG_ON_2G) {
if (channel_to_sw >= 1 && channel_to_sw <= 14)
channel_idx = PHYDM_2G;
for (rfpath = RF_PATH_A; rfpath < max_rf_path; rfpath++) {
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phydm_kfree(): channel_to_sw=%d PATH_%d bb_gain:0x%X\n", channel_to_sw, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]);
phydm_set_kfree_to_rf(dm, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]);
}
} else if (*dm->band_type == ODM_BAND_5G && power_trim_info->flag & KFREE_FLAG_ON_5G) {
if (channel_to_sw >= 36 && channel_to_sw <= 48)
channel_idx = PHYDM_5GLB1;
if (channel_to_sw >= 52 && channel_to_sw <= 64)
channel_idx = PHYDM_5GLB2;
if (channel_to_sw >= 100 && channel_to_sw <= 120)
channel_idx = PHYDM_5GMB1;
if (channel_to_sw >= 122 && channel_to_sw <= 144)
channel_idx = PHYDM_5GMB2;
if (channel_to_sw >= 149 && channel_to_sw <= 177)
channel_idx = PHYDM_5GHB;
for (rfpath = RF_PATH_A; rfpath < max_rf_path; rfpath++) {
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] phydm_kfree(): channel_to_sw=%d PATH_%d bb_gain:0x%X\n", channel_to_sw, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]);
phydm_set_kfree_to_rf(dm, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]);
}
} else {
PHYDM_DBG(dm, ODM_COMP_MP, "[kfree] Set default Register\n");
for (rfpath = RF_PATH_A; rfpath < max_rf_path; rfpath++)
phydm_clear_kfree_to_rf(dm, rfpath, power_trim_info->bb_gain[channel_idx][rfpath]);
}
}
PHYDM_DBG(dm, ODM_COMP_MP, "<===[kfree] phy_ConfigKFree()\n");
}

142
hal/phydm/halrf/halrf_kfree.h Normal file
View File

@@ -0,0 +1,142 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __PHYDMKFREE_H__
#define __PHYDKFREE_H__
#define KFREE_VERSION "1.0"
#define KFREE_BAND_NUM 6
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
#define BB_GAIN_NUM 6
#endif
#define KFREE_FLAG_ON BIT(0)
#define KFREE_FLAG_THERMAL_K_ON BIT(1)
#define KFREE_FLAG_ON_2G BIT(2)
#define KFREE_FLAG_ON_5G BIT(3)
#define PA_BIAS_FLAG_ON BIT(4)
#define PPG_THERMAL_OFFSET_8821C 0x1EF
#define PPG_BB_GAIN_2G_TXAB_OFFSET_8821C 0x1EE
#define PPG_BB_GAIN_5GL1_TXA_OFFSET_8821C 0x1EC
#define PPG_BB_GAIN_5GL2_TXA_OFFSET_8821C 0x1E8
#define PPG_BB_GAIN_5GM1_TXA_OFFSET_8821C 0x1E4
#define PPG_BB_GAIN_5GM2_TXA_OFFSET_8821C 0x1E0
#define PPG_BB_GAIN_5GH1_TXA_OFFSET_8821C 0x1DC
#define PPG_THERMAL_OFFSET 0x3EF
#define PPG_BB_GAIN_2G_TXAB_OFFSET 0x3EE
#define PPG_BB_GAIN_2G_TXCD_OFFSET 0x3ED
#define PPG_BB_GAIN_5GL1_TXA_OFFSET 0x3EC
#define PPG_BB_GAIN_5GL1_TXB_OFFSET 0x3EB
#define PPG_BB_GAIN_5GL1_TXC_OFFSET 0x3EA
#define PPG_BB_GAIN_5GL1_TXD_OFFSET 0x3E9
#define PPG_BB_GAIN_5GL2_TXA_OFFSET 0x3E8
#define PPG_BB_GAIN_5GL2_TXB_OFFSET 0x3E7
#define PPG_BB_GAIN_5GL2_TXC_OFFSET 0x3E6
#define PPG_BB_GAIN_5GL2_TXD_OFFSET 0x3E5
#define PPG_BB_GAIN_5GM1_TXA_OFFSET 0x3E4
#define PPG_BB_GAIN_5GM1_TXB_OFFSET 0x3E3
#define PPG_BB_GAIN_5GM1_TXC_OFFSET 0x3E2
#define PPG_BB_GAIN_5GM1_TXD_OFFSET 0x3E1
#define PPG_BB_GAIN_5GM2_TXA_OFFSET 0x3E0
#define PPG_BB_GAIN_5GM2_TXB_OFFSET 0x3DF
#define PPG_BB_GAIN_5GM2_TXC_OFFSET 0x3DE
#define PPG_BB_GAIN_5GM2_TXD_OFFSET 0x3DD
#define PPG_BB_GAIN_5GH1_TXA_OFFSET 0x3DC
#define PPG_BB_GAIN_5GH1_TXB_OFFSET 0x3DB
#define PPG_BB_GAIN_5GH1_TXC_OFFSET 0x3DA
#define PPG_BB_GAIN_5GH1_TXD_OFFSET 0x3D9
#define PPG_PA_BIAS_2G_TXA_OFFSET 0x3D5
#define PPG_PA_BIAS_2G_TXB_OFFSET 0x3D6
struct odm_power_trim_data {
u8 flag;
u8 pa_bias_flag;
s8 bb_gain[KFREE_BAND_NUM][MAX_RF_PATH];
s8 thermal;
};
enum phydm_kfree_channeltosw {
PHYDM_2G = 0,
PHYDM_5GLB1 = 1,
PHYDM_5GLB2 = 2,
PHYDM_5GMB1 = 3,
PHYDM_5GMB2 = 4,
PHYDM_5GHB = 5,
};
void
phydm_get_thermal_trim_offset(
void *dm_void
);
void
phydm_get_power_trim_offset(
void *dm_void
);
void
phydm_get_pa_bias_offset(
void *dm_void
);
s8
phydm_get_thermal_offset(
void *dm_void
);
void
phydm_clear_kfree_to_rf(
void *dm_void,
u8 e_rf_path,
u8 data
);
void
phydm_config_kfree(
void *dm_void,
u8 channel_to_sw
);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
/* ************************************************************
* include files
* ************************************************************ */
#include "mp_precomp.h"
#include "phydm_precomp.h"
boolean
odm_check_power_status(
void *dm_void
)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
struct dm_struct *dm = (struct dm_struct *)dm_void;
PADAPTER adapter = (PADAPTER)dm->adapter;
RT_RF_POWER_STATE rt_state;
MGNT_INFO *mgnt_info = &adapter->MgntInfo;
/* 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. */
if (mgnt_info->init_adpt_in_progress == true) {
PHYDM_DBG(dm, ODM_COMP_INIT, "check_pow_status Return true, due to initadapter\n");
return true;
}
/* */
/* 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. */
/* */
adapter->HalFunc.GetHwRegHandler(adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state));
if (adapter->bDriverStopped || adapter->bDriverIsGoingToPnpSetPowerSleep || rt_state == eRfOff) {
PHYDM_DBG(dm, ODM_COMP_INIT, "check_pow_status Return false, due to %d/%d/%d\n",
adapter->bDriverStopped, adapter->bDriverIsGoingToPnpSetPowerSleep, rt_state);
return false;
}
#endif
return true;
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
void
halrf_update_pwr_track(
void *dm_void,
u8 rate
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
u8 path_idx = 0;
#endif
PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "Pwr Track Get rate=0x%x\n", rate);
dm->tx_rate = rate;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#if DEV_BUS_TYPE == RT_PCI_INTERFACE
#if USE_WORKITEM
odm_schedule_work_item(&dm->ra_rpt_workitem);
#else
if (dm->support_ic_type == ODM_RTL8821) {
#if (RTL8821A_SUPPORT == 1)
odm_tx_pwr_track_set_pwr8821a(dm, MIX_MODE, RF_PATH_A, 0);
#endif
} else if (dm->support_ic_type == ODM_RTL8812) {
for (path_idx = RF_PATH_A; path_idx < MAX_PATH_NUM_8812A; path_idx++) {
#if (RTL8812A_SUPPORT == 1)
odm_tx_pwr_track_set_pwr8812a(dm, MIX_MODE, path_idx, 0);
#endif
}
} else if (dm->support_ic_type == ODM_RTL8723B) {
#if (RTL8723B_SUPPORT == 1)
odm_tx_pwr_track_set_pwr_8723b(dm, MIX_MODE, RF_PATH_A, 0);
#endif
} else if (dm->support_ic_type == ODM_RTL8192E) {
for (path_idx = RF_PATH_A; path_idx < MAX_PATH_NUM_8192E; path_idx++) {
#if (RTL8192E_SUPPORT == 1)
odm_tx_pwr_track_set_pwr92_e(dm, MIX_MODE, path_idx, 0);
#endif
}
} else if (dm->support_ic_type == ODM_RTL8188E) {
#if (RTL8188E_SUPPORT == 1)
odm_tx_pwr_track_set_pwr88_e(dm, MIX_MODE, RF_PATH_A, 0);
#endif
}
#endif
#else
odm_schedule_work_item(&dm->ra_rpt_workitem);
#endif
#endif
}
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void
halrf_update_init_rate_work_item_callback(
void *context
)
{
void *adapter = (void *)context;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_struct *dm = &hal_data->DM_OutSrc;
u8 p = 0;
if (dm->support_ic_type == ODM_RTL8821) {
odm_tx_pwr_track_set_pwr8821a(dm, MIX_MODE, RF_PATH_A, 0);
/**/
} else if (dm->support_ic_type == ODM_RTL8812) {
for (p = RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) { /*DOn't know how to include &c*/
odm_tx_pwr_track_set_pwr8812a(dm, MIX_MODE, p, 0);
/**/
}
} else if (dm->support_ic_type == ODM_RTL8723B) {
odm_tx_pwr_track_set_pwr_8723b(dm, MIX_MODE, RF_PATH_A, 0);
/**/
} else if (dm->support_ic_type == ODM_RTL8192E) {
for (p = RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) { /*DOn't know how to include &c*/
odm_tx_pwr_track_set_pwr92_e(dm, MIX_MODE, p, 0);
/**/
}
} else if (dm->support_ic_type == ODM_RTL8188E) {
odm_tx_pwr_track_set_pwr88_e(dm, MIX_MODE, RF_PATH_A, 0);
/**/
}
}
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_POWER_TRACKING_H__
#define __HALRF_POWER_TRACKING_H__
boolean
odm_check_power_status(
void *dm_void
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
void
halrf_update_pwr_track(
void *dm_void,
u8 rate
);
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void
halrf_update_init_rate_work_item_callback(
void *context
);
#endif
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __PHYDMPOWERTRACKING_H__
#define __PHYDMPOWERTRACKING_H__
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#ifdef RTK_AC_SUPPORT
#define ODM_IC_11AC_SERIES_SUPPORT 1
#else
#define ODM_IC_11AC_SERIES_SUPPORT 0
#endif
#else
#define ODM_IC_11AC_SERIES_SUPPORT 1
#endif
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
#define DELTA_SWINGIDX_SIZE 30
#define DELTA_SWINTSSI_SIZE 61
#define BAND_NUM 3
#define MAX_RF_PATH 4
#define TXSCALE_TABLE_SIZE 37
#define CCK_TABLE_SIZE_8723D 41
/* JJ ADD 20161014 */
#define CCK_TABLE_SIZE_8710B 41
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM_MAX 10
#define IQK_BB_REG_NUM 9
#define AVG_THERMAL_NUM 8
#define iqk_matrix_reg_num 8
/* #define IQK_MATRIX_SETTINGS_NUM 1+24+21 */
#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
#if !defined(_OUTSRC_COEXIST)
#define OFDM_TABLE_SIZE_92D 43
#define OFDM_TABLE_SIZE 37
#define CCK_TABLE_SIZE 33
#define CCK_TABLE_SIZE_88F 21
/* #define OFDM_TABLE_SIZE_92E 54 */
/* #define CCK_TABLE_SIZE_92E 54 */
extern u32 ofdm_swing_table[OFDM_TABLE_SIZE_92D];
extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE_92D];
extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
#endif
#define ODM_OFDM_TABLE_SIZE 37
#define ODM_CCK_TABLE_SIZE 33
/* <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
extern u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE];
extern u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE];
static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
/* extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
* extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
* extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8]; */
#ifdef CONFIG_WLAN_HAL_8192EE
#define OFDM_TABLE_SIZE_92E 54
#define CCK_TABLE_SIZE_92E 54
extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8];
#endif
#define OFDM_TABLE_SIZE_8812 43
#define AVG_THERMAL_NUM_8812 4
#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
#elif(ODM_IC_11AC_SERIES_SUPPORT)
extern unsigned int ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812];
#endif
extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
/* JJ ADD 20161014 */
extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
#define dm_check_txpowertracking odm_txpowertracking_check
struct iqk_matrix_regs_setting {
boolean is_iqk_done;
s32 value[1][iqk_matrix_reg_num];
};
struct dm_rf_calibration_struct {
/* for tx power tracking */
u32 rega24; /* for TempCCK */
s32 rege94;
s32 rege9c;
s32 regeb4;
s32 regebc;
/* u8 is_txpowertracking; */
u8 tx_powercount;
boolean is_txpowertracking_init;
boolean is_txpowertracking;
u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
u8 tm_trigger;
u8 internal_pa_5g[2]; /* pathA / pathB */
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_value;
u8 thermal_value_lck;
u8 thermal_value_iqk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_dpk;
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_rx_gain;
u8 thermal_value_crystal;
u8 thermal_value_dpk_store;
u8 thermal_value_dpk_track;
boolean txpowertracking_in_progress;
boolean is_dpk_enable;
boolean is_reloadtxpowerindex;
u8 is_rf_pi_enable;
u32 txpowertracking_callback_cnt; /* cosa add for debug */
u8 is_cck_in_ch14;
u8 CCK_index;
u8 OFDM_index[MAX_RF_PATH];
s8 power_index_offset;
s8 delta_power_index;
s8 delta_power_index_last;
boolean is_tx_power_changed;
struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
u8 delta_lck;
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
u8 bb_swing_idx_ofdm[MAX_RF_PATH];
u8 bb_swing_idx_ofdm_current;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
#else
u8 bb_swing_idx_ofdm_base;
#endif
boolean bb_swing_flag_ofdm;
u8 bb_swing_idx_cck;
u8 bb_swing_idx_cck_current;
u8 bb_swing_idx_cck_base;
u8 default_ofdm_index;
u8 default_cck_index;
boolean bb_swing_flag_cck;
s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
s8 absolute_cck_swing_idx[MAX_RF_PATH];
s8 remnant_cck_swing_idx;
s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
boolean modify_tx_agc_flag_path_a;
boolean modify_tx_agc_flag_path_b;
boolean modify_tx_agc_flag_path_c;
boolean modify_tx_agc_flag_path_d;
boolean modify_tx_agc_flag_path_a_cck;
s8 kfree_offset[MAX_RF_PATH];
/* -------------------------------------------------------------------- */
/* for IQK */
u32 regc04;
u32 reg874;
u32 regc08;
u32 regb68;
u32 regb6c;
u32 reg870;
u32 reg860;
u32 reg864;
boolean is_iqk_initialized;
boolean is_lck_in_progress;
boolean is_antenna_detected;
boolean is_need_iqk;
boolean is_iqk_in_progress;
boolean is_iqk_pa_off;
u8 delta_iqk;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u64 iqk_start_time;
u64 iqk_total_progressing_time;
u64 iqk_progressing_time;
u64 lck_progressing_time;
u32 lok_result;
u8 iqk_step;
u8 kcount;
u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
boolean is_mp_mode;
/* for APK */
u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
u8 is_ap_kdone;
u8 is_apk_thermal_meter_ignore;
u8 is_dp_done;
u8 is_dp_path_aok;
u8 is_dp_path_bok;
/*Add by Yuchen for Kfree Phydm*/
u8 reg_rf_kfree_enable; /*for registry*/
u8 rf_kfree_enable; /*for efuse enable check*/
u32 tx_lok[2];
};
void
odm_txpowertracking_check_ap(
void *dm_void
);
void
odm_txpowertracking_check(
void *dm_void
);
void
odm_txpowertracking_thermal_meter_init(
void *dm_void
);
void
odm_txpowertracking_init(
void *dm_void
);
void
odm_txpowertracking_check_mp(
void *dm_void
);
void
odm_txpowertracking_check_ce(
void *dm_void
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
void
odm_txpowertracking_callback_thermal_meter92c(
void *adapter
);
void
odm_txpowertracking_callback_rx_gain_thermal_meter92d(
void *adapter
);
void
odm_txpowertracking_callback_thermal_meter92d(
void *adapter
);
void
odm_txpowertracking_direct_call92c(
void *adapter
);
void
odm_txpowertracking_thermal_meter_check(
void *adapter
);
#endif
#endif

761
hal/phydm/halrf/halrf_powertracking_ce.c Normal file
View File

@@ -0,0 +1,761 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
/*============================================================ */
/* include files */
/*============================================================ */
#include "mp_precomp.h"
#include "phydm_precomp.h"
/* ************************************************************
* Global var
* ************************************************************ */
u32 ofdm_swing_table[OFDM_TABLE_SIZE] = {
0x7f8001fe, /* 0, +6.0dB */
0x788001e2, /* 1, +5.5dB */
0x71c001c7, /* 2, +5.0dB*/
0x6b8001ae, /* 3, +4.5dB*/
0x65400195, /* 4, +4.0dB*/
0x5fc0017f, /* 5, +3.5dB*/
0x5a400169, /* 6, +3.0dB*/
0x55400155, /* 7, +2.5dB*/
0x50800142, /* 8, +2.0dB*/
0x4c000130, /* 9, +1.5dB*/
0x47c0011f, /* 10, +1.0dB*/
0x43c0010f, /* 11, +0.5dB*/
0x40000100, /* 12, +0dB*/
0x3c8000f2, /* 13, -0.5dB*/
0x390000e4, /* 14, -1.0dB*/
0x35c000d7, /* 15, -1.5dB*/
0x32c000cb, /* 16, -2.0dB*/
0x300000c0, /* 17, -2.5dB*/
0x2d4000b5, /* 18, -3.0dB*/
0x2ac000ab, /* 19, -3.5dB*/
0x288000a2, /* 20, -4.0dB*/
0x26000098, /* 21, -4.5dB*/
0x24000090, /* 22, -5.0dB*/
0x22000088, /* 23, -5.5dB*/
0x20000080, /* 24, -6.0dB*/
0x1e400079, /* 25, -6.5dB*/
0x1c800072, /* 26, -7.0dB*/
0x1b00006c, /* 27. -7.5dB*/
0x19800066, /* 28, -8.0dB*/
0x18000060, /* 29, -8.5dB*/
0x16c0005b, /* 30, -9.0dB*/
0x15800056, /* 31, -9.5dB*/
0x14400051, /* 32, -10.0dB*/
0x1300004c, /* 33, -10.5dB*/
0x12000048, /* 34, -11.0dB*/
0x11000044, /* 35, -11.5dB*/
0x10000040, /* 36, -12.0dB*/
};
u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB*/
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB*/
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB*/
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB*/
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB*/
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB*/
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB*/
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB <== default */
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB*/
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB*/
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB*/
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB*/
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB*/
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB*/
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB*/
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB*/
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB*/
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB*/
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB*/
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB*/
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB*/
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB*/
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB*/
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB*/
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB*/
};
u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB*/
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB*/
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB*/
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB*/
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB <== default*/
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB*/
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB*/
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB*/
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB*/
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB*/
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB*/
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB*/
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB*/
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB*/
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB*/
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB*/
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB*/
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB*/
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB*/
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB*/
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB*/
};
u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = {
0x0b40002d, /* 0, -15.0dB */
0x0c000030, /* 1, -14.5dB*/
0x0cc00033, /* 2, -14.0dB*/
0x0d800036, /* 3, -13.5dB*/
0x0e400039, /* 4, -13.0dB */
0x0f00003c, /* 5, -12.5dB*/
0x10000040, /* 6, -12.0dB*/
0x11000044, /* 7, -11.5dB*/
0x12000048, /* 8, -11.0dB*/
0x1300004c, /* 9, -10.5dB*/
0x14400051, /* 10, -10.0dB*/
0x15800056, /* 11, -9.5dB*/
0x16c0005b, /* 12, -9.0dB*/
0x18000060, /* 13, -8.5dB*/
0x19800066, /* 14, -8.0dB*/
0x1b00006c, /* 15, -7.5dB*/
0x1c800072, /* 16, -7.0dB*/
0x1e400079, /* 17, -6.5dB*/
0x20000080, /* 18, -6.0dB*/
0x22000088, /* 19, -5.5dB*/
0x24000090, /* 20, -5.0dB*/
0x26000098, /* 21, -4.5dB*/
0x288000a2, /* 22, -4.0dB*/
0x2ac000ab, /* 23, -3.5dB*/
0x2d4000b5, /* 24, -3.0dB*/
0x300000c0, /* 25, -2.5dB*/
0x32c000cb, /* 26, -2.0dB*/
0x35c000d7, /* 27, -1.5dB*/
0x390000e4, /* 28, -1.0dB*/
0x3c8000f2, /* 29, -0.5dB*/
0x40000100, /* 30, +0dB*/
0x43c0010f, /* 31, +0.5dB*/
0x47c0011f, /* 32, +1.0dB*/
0x4c000130, /* 33, +1.5dB*/
0x50800142, /* 34, +2.0dB*/
0x55400155, /* 35, +2.5dB*/
0x5a400169, /* 36, +3.0dB*/
0x5fc0017f, /* 37, +3.5dB*/
0x65400195, /* 38, +4.0dB*/
0x6b8001ae, /* 39, +4.5dB*/
0x71c001c7, /* 40, +5.0dB*/
0x788001e2, /* 41, +5.5dB*/
0x7f8001fe /* 42, +6.0dB*/
};
u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB*/
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB*/
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB*/
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB*/
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB*/
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB*/
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB*/
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB*/
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB*/
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB*/
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB*/
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB*/
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB*/
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB*/
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB*/
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB*/
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB*/
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /*20, -6.0dB */
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB*/
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB*/
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB*/
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB*/
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB*/
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB*/
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB*/
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB*/
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB*/
};
u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB*/
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB*/
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB*/
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB*/
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB*/
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*5, -13.5dB*/
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB*/
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB*/
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB*/
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB*/
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB*/
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /*11, -10.5dB*/
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB*/
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB*/
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*14, -9.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB*/
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB*/
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB*/
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /*23, -4.5dB*/
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /*27, -2.5dB*/
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /*29, -1.5dB*/
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */
};
u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
0x0CD, /*0 , -20dB*/
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263,
0x287,
0x2AE,
0x2D6,
0x301,
0x32F,
0x35F,
0x392,
0x3C9,
0x402,
0x43F,
0x47F,
0x4C3,
0x50C,
0x558,
0x5A9,
0x5FF,
0x65A,
0x6BA,
0x720,
0x78C,
0x7FF,
};
/* JJ ADD 20161014 */
u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
0x0CD, /*0 , -20dB*/
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263,
0x287,
0x2AE,
0x2D6,
0x301,
0x32F,
0x35F,
0x392,
0x3C9,
0x402,
0x43F,
0x47F,
0x4C3,
0x50C,
0x558,
0x5A9,
0x5FF,
0x65A,
0x6BA,
0x720,
0x78C,
0x7FF,
};
u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
0x081, /* 0, -12.0dB*/
0x088, /* 1, -11.5dB*/
0x090, /* 2, -11.0dB*/
0x099, /* 3, -10.5dB*/
0x0A2, /* 4, -10.0dB*/
0x0AC, /* 5, -9.5dB*/
0x0B6, /* 6, -9.0dB*/
0x0C0, /*7, -8.5dB*/
0x0CC, /* 8, -8.0dB*/
0x0D8, /* 9, -7.5dB*/
0x0E5, /* 10, -7.0dB*/
0x0F2, /* 11, -6.5dB*/
0x101, /* 12, -6.0dB*/
0x110, /* 13, -5.5dB*/
0x120, /* 14, -5.0dB*/
0x131, /* 15, -4.5dB*/
0x143, /* 16, -4.0dB*/
0x156, /* 17, -3.5dB*/
0x16A, /* 18, -3.0dB*/
0x180, /* 19, -2.5dB*/
0x197, /* 20, -2.0dB*/
0x1AF, /* 21, -1.5dB*/
0x1C8, /* 22, -1.0dB*/
0x1E3, /* 23, -0.5dB*/
0x200, /* 24, +0 dB*/
0x21E, /* 25, +0.5dB*/
0x23E, /* 26, +1.0dB*/
0x261, /* 27, +1.5dB*/
0x285,/* 28, +2.0dB*/
0x2AB, /* 29, +2.5dB*/
0x2D3, /*30, +3.0dB*/
0x2FE, /* 31, +3.5dB*/
0x32B, /* 32, +4.0dB*/
0x35C, /* 33, +4.5dB*/
0x38E, /* 34, +5.0dB*/
0x3C4, /* 35, +5.5dB*/
0x3FE /* 36, +6.0dB */
};
void
odm_txpowertracking_init(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B)))
return;
#endif
odm_txpowertracking_thermal_meter_init(dm);
}
u8
get_swing_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
#endif
u8 i = 0;
u32 bb_swing;
u32 swing_table_size;
u32 *swing_table;
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B
|| dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710B
) {
bb_swing = odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000);
swing_table = ofdm_swing_table_new;
swing_table_size = OFDM_TABLE_SIZE;
} else {
#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
if (dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8821) {
bb_swing = phy_get_tx_bb_swing_8812a(adapter, hal_data->current_band_type, RF_PATH_A);
swing_table = tx_scaling_table_jaguar;
swing_table_size = TXSCALE_TABLE_SIZE;
} else
#endif
{
bb_swing = 0;
swing_table = ofdm_swing_table;
swing_table_size = OFDM_TABLE_SIZE;
}
}
for (i = 0; i < swing_table_size; ++i) {
u32 table_value = swing_table[i];
if (table_value >= 0x100000)
table_value >>= 22;
if (bb_swing == table_value)
break;
}
return i;
}
u8
get_cck_swing_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 i = 0;
u32 bb_cck_swing;
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8192E) {
bb_cck_swing = odm_read_1byte(dm, 0xa22);
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
break;
}
} else if (dm->support_ic_type == ODM_RTL8703B) {
bb_cck_swing = odm_read_1byte(dm, 0xa22);
for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
break;
}
}
return i;
}
void
odm_txpowertracking_thermal_meter_init(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 default_swing_index = get_swing_index(dm);
u8 default_cck_swing_index = get_cck_swing_index(dm);
u8 p = 0;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
if (*dm->mp_mode == false)
hal_data->txpowertrack_control = true;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#ifdef DM_ODM_CE_MAC80211
struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv);
#else
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
#endif
cali_info->is_txpowertracking = true;
cali_info->tx_powercount = 0;
cali_info->is_txpowertracking_init = false;
if (*dm->mp_mode == false)
cali_info->txpowertrack_control = true;
else
cali_info->txpowertrack_control = false;
if (*dm->mp_mode == false)
cali_info->txpowertrack_control = true;
PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "dm txpowertrack_control = %d\n", cali_info->txpowertrack_control);
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#ifdef RTL8188E_SUPPORT
{
cali_info->is_txpowertracking = true;
cali_info->tx_powercount = 0;
cali_info->is_txpowertracking_init = false;
cali_info->txpowertrack_control = true;
}
#endif
#endif
/* dm->rf_calibrate_info.txpowertrack_control = true; */
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
cali_info->thermal_value = rtlefu->eeprom_thermalmeter;
cali_info->thermal_value_iqk = rtlefu->eeprom_thermalmeter;
cali_info->thermal_value_lck = rtlefu->eeprom_thermalmeter;
#else
cali_info->thermal_value = hal_data->eeprom_thermal_meter;
cali_info->thermal_value_iqk = hal_data->eeprom_thermal_meter;
cali_info->thermal_value_lck = hal_data->eeprom_thermal_meter;
#endif
if (cali_info->default_bb_swing_index_flag != true) {
/*The index of "0 dB" in SwingTable.*/
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B) {
cali_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index;
cali_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index;
} else if (dm->support_ic_type == ODM_RTL8188F) { /*add by Mingzhi.Guo 2015-03-23*/
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 20; /*CCK:-6dB*/
} else if (dm->support_ic_type == ODM_RTL8723D) { /*add by zhaohe 2015-10-27*/
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
} else if (dm->support_ic_type == ODM_RTL8710B) { /* JJ ADD 20161014 */
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
} else {
cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
cali_info->default_cck_index = 24;
}
cali_info->default_bb_swing_index_flag = true;
}
cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
cali_info->CCK_index = cali_info->default_cck_index;
for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
cali_info->delta_power_index[p] = 0;
cali_info->delta_power_index_last[p] = 0;
cali_info->power_index_offset[p] = 0;
}
cali_info->modify_tx_agc_value_ofdm = 0;
cali_info->modify_tx_agc_value_cck = 0;
cali_info->tm_trigger = 0;
}
void
odm_txpowertracking_check(
void *dm_void
)
{
/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
at the same time. In the stage2/3, we need to prive universal interface and merge all
HW dynamic mechanism. */
struct dm_struct *dm = (struct dm_struct *)dm_void;
switch (dm->support_platform) {
case ODM_WIN:
odm_txpowertracking_check_mp(dm);
break;
case ODM_CE:
odm_txpowertracking_check_ce(dm);
break;
case ODM_AP:
odm_txpowertracking_check_ap(dm);
break;
default:
break;
}
}
void
odm_txpowertracking_check_ce(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
void *adapter = dm->adapter;
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
return;
if (!dm->rf_calibrate_info.tm_trigger) {
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E |
ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 |
ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D |
ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B))
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03);
else
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD, RFREGOFFSETMASK, 0x60);
dm->rf_calibrate_info.tm_trigger = 1;
return;
} else {
odm_txpowertracking_callback_thermal_meter(dm);
dm->rf_calibrate_info.tm_trigger = 0;
}
#endif
}
void
odm_txpowertracking_check_mp(
void *dm_void
)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
struct dm_struct *dm = (struct dm_struct *)dm_void;
void *adapter = dm->adapter;
if (odm_check_power_status(adapter) == false) {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status, return false\n"));
return;
}
odm_txpowertracking_thermal_meter_check(adapter);
#endif
}
void
odm_txpowertracking_check_ap(
void *dm_void
)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct rtl8192cd_priv *priv = dm->priv;
return;
#endif
}

348
hal/phydm/halrf/halrf_powertracking_ce.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __PHYDMPOWERTRACKING_H__
#define __PHYDMPOWERTRACKING_H__
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
#define OFDM_TABLE_SIZE 43
#define CCK_TABLE_SIZE 33
#define CCK_TABLE_SIZE_88F 21
#define TXSCALE_TABLE_SIZE 37
#define CCK_TABLE_SIZE_8723D 41
/* JJ ADD 20161014 */
#define CCK_TABLE_SIZE_8710B 41
#define TXPWR_TRACK_TABLE_SIZE 30
#define DELTA_SWINGIDX_SIZE 30
#define DELTA_SWINTSSI_SIZE 61
#define BAND_NUM 4
#define AVG_THERMAL_NUM 8
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM_MAX 10
#define IQK_BB_REG_NUM 9
#define iqk_matrix_reg_num 8
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
#else
#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
#endif
extern u32 ofdm_swing_table[OFDM_TABLE_SIZE];
extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
/* JJ ADD 20161014 */
extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
#else
static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
#endif
#define dm_check_txpowertracking odm_txpowertracking_check
struct iqk_matrix_regs_setting {
boolean is_iqk_done;
s32 value[3][iqk_matrix_reg_num];
boolean is_bw_iqk_result_saved[3];
};
struct dm_rf_calibration_struct {
/* for tx power tracking */
u32 rega24; /* for TempCCK */
s32 rege94;
s32 rege9c;
s32 regeb4;
s32 regebc;
u8 tx_powercount;
boolean is_txpowertracking_init;
boolean is_txpowertracking;
u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
u8 tm_trigger;
u8 internal_pa_5g[2]; /* pathA / pathB */
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_value;
u8 thermal_value_lck;
u8 thermal_value_iqk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_dpk;
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_rx_gain;
u8 thermal_value_crystal;
u8 thermal_value_dpk_store;
u8 thermal_value_dpk_track;
boolean txpowertracking_in_progress;
boolean is_reloadtxpowerindex;
u8 is_rf_pi_enable;
u32 txpowertracking_callback_cnt; /* cosa add for debug */
/* ------------------------- Tx power Tracking ------------------------- */
u8 is_cck_in_ch14;
u8 CCK_index;
u8 OFDM_index[MAX_RF_PATH];
s8 power_index_offset[MAX_RF_PATH];
s8 delta_power_index[MAX_RF_PATH];
s8 delta_power_index_last[MAX_RF_PATH];
boolean is_tx_power_changed;
s8 xtal_offset;
s8 xtal_offset_last;
struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
u8 delta_lck;
s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
u8 bb_swing_idx_ofdm[MAX_RF_PATH];
u8 bb_swing_idx_ofdm_current;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
#else
u8 bb_swing_idx_ofdm_base;
#endif
boolean default_bb_swing_index_flag;
boolean bb_swing_flag_ofdm;
u8 bb_swing_idx_cck;
u8 bb_swing_idx_cck_current;
u8 bb_swing_idx_cck_base;
u8 default_ofdm_index;
u8 default_cck_index;
boolean bb_swing_flag_cck;
s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
s8 absolute_cck_swing_idx[MAX_RF_PATH];
s8 remnant_cck_swing_idx;
s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
boolean modify_tx_agc_flag_path_a;
boolean modify_tx_agc_flag_path_b;
boolean modify_tx_agc_flag_path_c;
boolean modify_tx_agc_flag_path_d;
boolean modify_tx_agc_flag_path_a_cck;
s8 kfree_offset[MAX_RF_PATH];
/* -------------------------------------------------------------------- */
/* for IQK */
u32 regc04;
u32 reg874;
u32 regc08;
u32 regb68;
u32 regb6c;
u32 reg870;
u32 reg860;
u32 reg864;
boolean is_iqk_initialized;
boolean is_lck_in_progress;
boolean is_antenna_detected;
boolean is_need_iqk;
boolean is_iqk_in_progress;
boolean is_iqk_pa_off;
u8 delta_iqk;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
/* JJ ADD 20161014 */
u32 tx_iqc_8710b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8710b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u8 iqk_step;
u8 kcount;
u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
boolean is_mp_mode;
/* <James> IQK time measurement */
u64 iqk_start_time;
u64 iqk_progressing_time;
u64 iqk_total_progressing_time;
u64 lck_progressing_time;
u32 lok_result;
/* for APK */
u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
u8 is_ap_kdone;
u8 is_apk_thermal_meter_ignore;
/* DPK */
boolean is_dpk_fail;
u8 is_dp_done;
u8 is_dp_path_aok;
u8 is_dp_path_bok;
u32 tx_lok[2];
u32 dpk_tx_agc;
s32 dpk_gain;
u32 dpk_thermal[4];
s8 modify_tx_agc_value_ofdm;
s8 modify_tx_agc_value_cck;
/*Add by Yuchen for Kfree Phydm*/
u8 reg_rf_kfree_enable; /*for registry*/
u8 rf_kfree_enable; /*for efuse enable check*/
};
void
odm_txpowertracking_check(
void *dm_void
);
void
odm_txpowertracking_init(
void *dm_void
);
void
odm_txpowertracking_check_ap(
void *dm_void
);
void
odm_txpowertracking_thermal_meter_init(
void *dm_void
);
void
odm_txpowertracking_init(
void *dm_void
);
void
odm_txpowertracking_check_mp(
void *dm_void
);
void
odm_txpowertracking_check_ce(
void *dm_void
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
void
odm_txpowertracking_callback_thermal_meter92c(
void *adapter
);
void
odm_txpowertracking_callback_rx_gain_thermal_meter92d(
void *adapter
);
void
odm_txpowertracking_callback_thermal_meter92d(
void *adapter
);
void
odm_txpowertracking_direct_call92c(
void *adapter
);
void
odm_txpowertracking_thermal_meter_check(
void *adapter
);
#endif
#endif

806
hal/phydm/halrf/halrf_powertracking_win.c Normal file
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@@ -0,0 +1,806 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/*============================================================ */
/* include files */
/*============================================================ */
#include "mp_precomp.h"
#include "phydm_precomp.h"
/* ************************************************************
* Global var
* ************************************************************ */
u32 ofdm_swing_table[OFDM_TABLE_SIZE] = {
0x7f8001fe, /* 0, +6.0dB */
0x788001e2, /* 1, +5.5dB */
0x71c001c7, /* 2, +5.0dB */
0x6b8001ae, /* 3, +4.5dB */
0x65400195, /* 4, +4.0dB */
0x5fc0017f, /* 5, +3.5dB */
0x5a400169, /* 6, +3.0dB */
0x55400155, /* 7, +2.5dB */
0x50800142, /* 8, +2.0dB */
0x4c000130, /* 9, +1.5dB */
0x47c0011f, /* 10, +1.0dB */
0x43c0010f, /* 11, +0.5dB */
0x40000100, /* 12, +0dB */
0x3c8000f2, /* 13, -0.5dB */
0x390000e4, /* 14, -1.0dB */
0x35c000d7, /* 15, -1.5dB */
0x32c000cb, /* 16, -2.0dB */
0x300000c0, /* 17, -2.5dB */
0x2d4000b5, /* 18, -3.0dB */
0x2ac000ab, /* 19, -3.5dB */
0x288000a2, /* 20, -4.0dB */
0x26000098, /* 21, -4.5dB */
0x24000090, /* 22, -5.0dB */
0x22000088, /* 23, -5.5dB */
0x20000080, /* 24, -6.0dB */
0x1e400079, /* 25, -6.5dB */
0x1c800072, /* 26, -7.0dB */
0x1b00006c, /* 27. -7.5dB */
0x19800066, /* 28, -8.0dB */
0x18000060, /* 29, -8.5dB */
0x16c0005b, /* 30, -9.0dB */
0x15800056, /* 31, -9.5dB */
0x14400051, /* 32, -10.0dB */
0x1300004c, /* 33, -10.5dB */
0x12000048, /* 34, -11.0dB */
0x11000044, /* 35, -11.5dB */
0x10000040, /* 36, -12.0dB */
};
u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB <== default */
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
};
u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB <== default */
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
};
u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = {
0x0b40002d, /* 0, -15.0dB */
0x0c000030, /* 1, -14.5dB */
0x0cc00033, /* 2, -14.0dB */
0x0d800036, /* 3, -13.5dB */
0x0e400039, /* 4, -13.0dB */
0x0f00003c, /* 5, -12.5dB */
0x10000040, /* 6, -12.0dB */
0x11000044, /* 7, -11.5dB */
0x12000048, /* 8, -11.0dB */
0x1300004c, /* 9, -10.5dB */
0x14400051, /* 10, -10.0dB */
0x15800056, /* 11, -9.5dB */
0x16c0005b, /* 12, -9.0dB */
0x18000060, /* 13, -8.5dB */
0x19800066, /* 14, -8.0dB */
0x1b00006c, /* 15, -7.5dB */
0x1c800072, /* 16, -7.0dB */
0x1e400079, /* 17, -6.5dB */
0x20000080, /* 18, -6.0dB */
0x22000088, /* 19, -5.5dB */
0x24000090, /* 20, -5.0dB */
0x26000098, /* 21, -4.5dB */
0x288000a2, /* 22, -4.0dB */
0x2ac000ab, /* 23, -3.5dB */
0x2d4000b5, /* 24, -3.0dB */
0x300000c0, /* 25, -2.5dB */
0x32c000cb, /* 26, -2.0dB */
0x35c000d7, /* 27, -1.5dB */
0x390000e4, /* 28, -1.0dB */
0x3c8000f2, /* 29, -0.5dB */
0x40000100, /* 30, +0dB */
0x43c0010f, /* 31, +0.5dB */
0x47c0011f, /* 32, +1.0dB */
0x4c000130, /* 33, +1.5dB */
0x50800142, /* 34, +2.0dB */
0x55400155, /* 35, +2.5dB */
0x5a400169, /* 36, +3.0dB */
0x5fc0017f, /* 37, +3.5dB */
0x65400195, /* 38, +4.0dB */
0x6b8001ae, /* 39, +4.5dB */
0x71c001c7, /* 40, +5.0dB */
0x788001e2, /* 41, +5.5dB */
0x7f8001fe /* 42, +6.0dB */
};
u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB */
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB */
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB */
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB */
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB */
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB */
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB */
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB */
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB */
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB */
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB */
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB */
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB */
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB */
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB */
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB */
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB */
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 20, -6.0dB */
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB */
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB */
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB */
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB */
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB */
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB */
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB */
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB */
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB */
};
u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB */
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB */
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB */
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB */
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB */
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 5, -13.5dB */
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB */
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB */
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB */
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB */
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB */
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 11, -10.5dB */
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB */
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB */
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 14, -9.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB */
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB */
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB */
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 23, -4.5dB */
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 27, -2.5dB */
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 29, -1.5dB */
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */
};
u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
0x0CD,
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263,
0x287,
0x2AE,
0x2D6,
0x301,
0x32F,
0x35F,
0x392,
0x3C9,
0x402,
0x43F,
0x47F,
0x4C3,
0x50C,
0x558,
0x5A9,
0x5FF,
0x65A,
0x6BA,
0x720,
0x78C,
0x7FF,
};
/* JJ ADD 20161014 */
u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
0x0CD, /*0 , -20dB*/
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263, /*19*/
0x287, /*20*/
0x2AE, /*21*/
0x2D6, /*22*/
0x301, /*23*/
0x32F, /*24*/
0x35F, /*25*/
0x392, /*26*/
0x3C9, /*27*/
0x402, /*28*/
0x43F, /*29*/
0x47F, /*30*/
0x4C3, /*31*/
0x50C, /*32*/
0x558, /*33*/
0x5A9, /*34*/
0x5FF, /*35*/
0x65A, /*36*/
0x6BA,
0x720,
0x78C,
0x7FF,
};
u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
0x081, /* 0, -12.0dB */
0x088, /* 1, -11.5dB */
0x090, /* 2, -11.0dB */
0x099, /* 3, -10.5dB */
0x0A2, /* 4, -10.0dB */
0x0AC, /* 5, -9.5dB */
0x0B6, /* 6, -9.0dB */
0x0C0, /* 7, -8.5dB */
0x0CC, /* 8, -8.0dB */
0x0D8, /* 9, -7.5dB */
0x0E5, /* 10, -7.0dB */
0x0F2, /* 11, -6.5dB */
0x101, /* 12, -6.0dB */
0x110, /* 13, -5.5dB */
0x120, /* 14, -5.0dB */
0x131, /* 15, -4.5dB */
0x143, /* 16, -4.0dB */
0x156, /* 17, -3.5dB */
0x16A, /* 18, -3.0dB */
0x180, /* 19, -2.5dB */
0x197, /* 20, -2.0dB */
0x1AF, /* 21, -1.5dB */
0x1C8, /* 22, -1.0dB */
0x1E3, /* 23, -0.5dB */
0x200, /* 24, +0 dB */
0x21E, /* 25, +0.5dB */
0x23E, /* 26, +1.0dB */
0x261, /* 27, +1.5dB */
0x285, /* 28, +2.0dB */
0x2AB, /* 29, +2.5dB */
0x2D3, /* 30, +3.0dB */
0x2FE, /* 31, +3.5dB */
0x32B, /* 32, +4.0dB */
0x35C, /* 33, +4.5dB */
0x38E, /* 34, +5.0dB */
0x3C4, /* 35, +5.5dB */
0x3FE /* 36, +6.0dB */
};
void
odm_txpowertracking_init(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B)))
return;
#endif
odm_txpowertracking_thermal_meter_init(dm);
}
u8
get_swing_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
u8 i = 0;
u32 bb_swing;
u32 swing_table_size;
u32 *swing_table;
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710B) {
bb_swing = odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000);
swing_table = ofdm_swing_table_new;
swing_table_size = OFDM_TABLE_SIZE;
} else {
bb_swing = PHY_GetTxBBSwing_8812A((PADAPTER)adapter, hal_data->CurrentBandType, RF_PATH_A);
swing_table = tx_scaling_table_jaguar;
swing_table_size = TXSCALE_TABLE_SIZE;
}
for (i = 0; i < swing_table_size; ++i) {
u32 table_value = swing_table[i];
if (table_value >= 0x100000)
table_value >>= 22;
if (bb_swing == table_value)
break;
}
return i;
}
u8
get_cck_swing_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 i = 0;
u32 bb_cck_swing;
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8192E) {
bb_cck_swing = odm_read_1byte(dm, 0xa22);
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
break;
}
} else if (dm->support_ic_type == ODM_RTL8703B) {
bb_cck_swing = odm_read_1byte(dm, 0xa22);
for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
break;
}
}
return i;
}
void
odm_txpowertracking_thermal_meter_init(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 default_swing_index = get_swing_index(dm);
u8 default_cck_swing_index = get_cck_swing_index(dm);
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
u8 p = 0;
if (*(dm->mp_mode) == false)
cali_info->txpowertrack_control = true;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#ifdef CONFIG_RTL8188E
{
cali_info->is_txpowertracking = true;
cali_info->tx_powercount = 0;
cali_info->is_txpowertracking_init = false;
if (*(dm->mp_mode) == false)
cali_info->txpowertrack_control = true;
MSG_8192C("dm txpowertrack_control = %d\n", cali_info->txpowertrack_control);
}
#else
{
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_priv *pdmpriv = &hal_data->dmpriv;
pdmpriv->is_txpowertracking = true;
pdmpriv->tx_powercount = 0;
pdmpriv->is_txpowertracking_init = false;
if (*(dm->mp_mode) == false)
pdmpriv->txpowertrack_control = true;
MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control);
}
#endif
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#ifdef RTL8188E_SUPPORT
{
cali_info->is_txpowertracking = true;
cali_info->tx_powercount = 0;
cali_info->is_txpowertracking_init = false;
cali_info->txpowertrack_control = true;
}
#endif
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#if (MP_DRIVER == 1)
cali_info->txpowertrack_control = false;
#else
cali_info->txpowertrack_control = true;
#endif
#else
cali_info->txpowertrack_control = true;
#endif
cali_info->thermal_value = hal_data->eeprom_thermal_meter;
cali_info->thermal_value_iqk = hal_data->eeprom_thermal_meter;
cali_info->thermal_value_lck = hal_data->eeprom_thermal_meter;
if (cali_info->default_bb_swing_index_flag != true) {
/*The index of "0 dB" in SwingTable.*/
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B) {
cali_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index;
cali_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index;
} else if (dm->support_ic_type == ODM_RTL8188F) { /*add by Mingzhi.Guo 2015-03-23*/
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 20; /*CCK:-6dB*/
} else if (dm->support_ic_type == ODM_RTL8723D) { /*add by zhaohe 2015-10-27*/
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
/* JJ ADD 20161014 */
} else if (dm->support_ic_type == ODM_RTL8710B) {
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
} else {
cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
cali_info->default_cck_index = 24;
}
cali_info->default_bb_swing_index_flag = true;
}
cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
cali_info->CCK_index = cali_info->default_cck_index;
for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
cali_info->delta_power_index[p] = 0;
cali_info->delta_power_index_last[p] = 0;
cali_info->power_index_offset[p] = 0;
cali_info->kfree_offset[p] = 0;
}
cali_info->modify_tx_agc_value_ofdm = 0;
cali_info->modify_tx_agc_value_cck = 0;
cali_info->tm_trigger = 0;
}
void
odm_txpowertracking_check(
void *dm_void
)
{
#if 0
/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
/* HW dynamic mechanism. */
#endif
struct dm_struct *dm = (struct dm_struct *)dm_void;
switch (dm->support_platform) {
case ODM_WIN:
odm_txpowertracking_check_mp(dm);
break;
case ODM_CE:
odm_txpowertracking_check_ce(dm);
break;
case ODM_AP:
odm_txpowertracking_check_ap(dm);
break;
default:
break;
}
}
void
odm_txpowertracking_check_ce(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
void *adapter = dm->adapter;
#if ((RTL8188F_SUPPORT == 1))
rtl8192c_odm_check_txpowertracking(adapter);
#endif
#if (RTL8188E_SUPPORT == 1)
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
return;
if (!cali_info->tm_trigger) {
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
/*DBG_8192C("Trigger 92C Thermal Meter!!\n");*/
cali_info->tm_trigger = 1;
return;
} else {
/*DBG_8192C("Schedule TxPowerTracking direct call!!\n");*/
odm_txpowertracking_callback_thermal_meter_8188e(adapter);
cali_info->tm_trigger = 0;
}
#endif
#endif
}
void
odm_txpowertracking_check_mp(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
if (*dm->is_fcs_mode_enable)
return;
if (odm_check_power_status(dm) == false) {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status return false\n"));
return;
}
if (IS_HARDWARE_TYPE_8821B(adapter)) /* TODO: Don't Do PowerTracking*/
return;
odm_txpowertracking_thermal_meter_check(adapter);
#endif
}
void
odm_txpowertracking_check_ap(
void *dm_void
)
{
return;
}
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void
odm_txpowertracking_direct_call(
void *adapter
)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_struct *dm = &hal_data->DM_OutSrc;
odm_txpowertracking_callback_thermal_meter(adapter);
}
void
odm_txpowertracking_thermal_meter_check(
void *adapter
)
{
static u8 tm_trigger = 0;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_struct *dm = &(pHalData->DM_OutSrc);
struct _hal_rf_ *rf = &(dm->rf_table);
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
("===>odm_txpowertracking_thermal_meter_check(),mgnt_info->is_txpowertracking is false, return!!\n"));
return;
}
if (!tm_trigger) {
if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) ||
IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8703B(adapter)
|| IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter) || IS_HARDWARE_TYPE_8710B(adapter))/* JJ ADD 20161014 */
PHY_SetRFReg((PADAPTER)adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
else
PHY_SetRFReg((PADAPTER)adapter, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger Thermal Meter!!\n"));
tm_trigger = 1;
return;
} else {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Schedule TxPowerTracking direct call!!\n"));
odm_txpowertracking_direct_call(adapter);
tm_trigger = 0;
}
}
#endif

299
hal/phydm/halrf/halrf_powertracking_win.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __PHYDMPOWERTRACKING_H__
#define __PHYDMPOWERTRACKING_H__
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
#define TXSCALE_TABLE_SIZE 37
#define OFDM_TABLE_SIZE 43
#define CCK_TABLE_SIZE 33
#define CCK_TABLE_SIZE_8723D 41
#define TXPWR_TRACK_TABLE_SIZE 30
#define DELTA_SWINGIDX_SIZE 30
#define DELTA_SWINTSSI_SIZE 61
#define BAND_NUM 3
#define MAX_RF_PATH 4
#define CCK_TABLE_SIZE_88F 21
/* JJ ADD 20161014 */
#define CCK_TABLE_SIZE_8710B 41
#define dm_check_txpowertracking odm_txpowertracking_check
#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
#define AVG_THERMAL_NUM 8
#define iqk_matrix_reg_num 8
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 9
extern u32 ofdm_swing_table[OFDM_TABLE_SIZE];
extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
/* JJ ADD 20161014 */
extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
void
odm_txpowertracking_check(
void *dm_void
);
void
odm_txpowertracking_check_ap(
void *dm_void
);
void
odm_txpowertracking_thermal_meter_init(
void *dm_void
);
void
odm_txpowertracking_init(
void *dm_void
);
void
odm_txpowertracking_check_mp(
void *dm_void
);
void
odm_txpowertracking_check_ce(
void *dm_void
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
void
odm_txpowertracking_thermal_meter_check(
void *adapter
);
#endif
struct iqk_matrix_regs_setting {
boolean is_iqk_done;
s32 value[3][iqk_matrix_reg_num];
boolean is_bw_iqk_result_saved[3];
};
struct dm_rf_calibration_struct {
/* for tx power tracking */
u32 rega24; /* for TempCCK */
s32 rege94;
s32 rege9c;
s32 regeb4;
s32 regebc;
/* u8 is_txpowertracking; */
u8 tx_powercount;
boolean is_txpowertracking_init;
boolean is_txpowertracking;
u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
u8 tm_trigger;
u8 internal_pa_5g[2]; /* pathA / pathB */
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_value;
u8 thermal_value_lck;
u8 thermal_value_iqk;
u8 thermal_value_dpk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_rx_gain;
boolean is_reloadtxpowerindex;
u8 is_rf_pi_enable;
u32 txpowertracking_callback_cnt; /* cosa add for debug */
/* ------------------------- Tx power Tracking ------------------------- */
u8 is_cck_in_ch14;
u8 CCK_index;
u8 OFDM_index[MAX_RF_PATH];
s8 power_index_offset[MAX_RF_PATH];
s8 delta_power_index[MAX_RF_PATH];
s8 delta_power_index_last[MAX_RF_PATH];
boolean is_tx_power_changed;
s8 xtal_offset;
s8 xtal_offset_last;
struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
u8 delta_lck;
s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
u8 bb_swing_idx_ofdm[MAX_RF_PATH];
u8 bb_swing_idx_ofdm_current;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
#else
u8 bb_swing_idx_ofdm_base;
#endif
boolean default_bb_swing_index_flag;
boolean bb_swing_flag_ofdm;
u8 bb_swing_idx_cck;
u8 bb_swing_idx_cck_current;
u8 bb_swing_idx_cck_base;
u8 default_ofdm_index;
u8 default_cck_index;
boolean bb_swing_flag_cck;
s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
s8 absolute_cck_swing_idx[MAX_RF_PATH];
s8 remnant_cck_swing_idx;
s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
boolean modify_tx_agc_flag_path_a;
boolean modify_tx_agc_flag_path_b;
boolean modify_tx_agc_flag_path_c;
boolean modify_tx_agc_flag_path_d;
boolean modify_tx_agc_flag_path_a_cck;
s8 kfree_offset[MAX_RF_PATH];
/* -------------------------------------------------------------------- */
/* for IQK */
u32 regc04;
u32 reg874;
u32 regc08;
u32 regb68;
u32 regb6c;
u32 reg870;
u32 reg860;
u32 reg864;
boolean is_iqk_initialized;
boolean is_lck_in_progress;
boolean is_antenna_detected;
boolean is_need_iqk;
boolean is_iqk_in_progress;
boolean is_iqk_pa_off;
u8 delta_iqk;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
/* JJ ADD 20161014 */
u32 tx_iqc_8710b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8710b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u64 iqk_start_time;
u64 iqk_total_progressing_time;
u64 iqk_progressing_time;
u64 lck_progressing_time;
u32 lok_result;
u8 iqk_step;
u8 kcount;
u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
boolean is_mp_mode;
/* for APK */
u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
u8 is_ap_kdone;
u8 is_apk_thermal_meter_ignore;
/* DPK */
boolean is_dpk_fail;
u8 is_dp_done;
u8 is_dp_path_aok;
u8 is_dp_path_bok;
u32 tx_lok[2];
u32 dpk_tx_agc;
s32 dpk_gain;
u32 dpk_thermal[4];
s8 modify_tx_agc_value_ofdm;
s8 modify_tx_agc_value_cck;
/*Add by Yuchen for Kfree Phydm*/
u8 reg_rf_kfree_enable; /*for registry*/
u8 rf_kfree_enable; /*for efuse enable check*/
};
#endif

321
hal/phydm/halrf/halrf_psd.c Normal file
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@@ -0,0 +1,321 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
//============================================================
// include files
//============================================================
#include "mp_precomp.h"
#include "phydm_precomp.h"
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if 0
u32 _sqrt(u64 n)
{
u64 ans = 0, q = 0;
s64 i;
/*for (i = sizeof(n) * 8 - 2; i > -1; i = i - 2) {*/
for (i = 8 * 8 - 2; i > -1; i = i - 2) {
q = (q << 2) | ((n & (3 << i)) >> i);
if (q >= ((ans << 2) | 1))
{
q = q - ((ans << 2) | 1);
ans = (ans << 1) | 1;
}
else
ans = ans << 1;
}
DbgPrint("ans=0x%x\n", ans);
return (u32)ans;
}
#endif
u64 _sqrt(u64 x)
{
u64 i = 0;
u64 j = x / 2 + 1;
while (i <= j) {
u64 mid = (i + j) / 2;
u64 sq = mid * mid;
if (sq == x)
return mid;
else if (sq < x)
i = mid + 1;
else
j = mid - 1;
}
return j;
}
u32
halrf_get_psd_data(
struct dm_struct *dm,
u32 point
)
{
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time;
#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
if (psd->average == 0)
delay_time = 100;
else
delay_time = 0;
#else
if (psd->average == 0)
delay_time = 1000;
else
delay_time = 100;
#endif
if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) {
psd_reg = 0x910;
psd_report = 0xf44;
} else {
psd_reg = 0x808;
psd_report = 0x8b4;
}
if (dm->support_ic_type & ODM_RTL8710B) {
psd_point = 0xeffffc00;
psd_start = 0x10000000;
} else {
psd_point = 0xffbffc00;
psd_start = 0x00400000;
}
psd_val = odm_get_bb_reg(dm, psd_reg, MASKDWORD);
psd_val &= psd_point;
psd_val |= point;
odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val);
psd_val |= psd_start;
odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val);
for (i = 0; i < delay_time; i++)
ODM_delay_us(1);
psd_val = odm_get_bb_reg(dm, psd_report, MASKDWORD);
if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8710B)) {
psd_val &= MASKL3BYTES;
psd_val = psd_val / 32;
} else
psd_val &= MASKLWORD;
return psd_val;
}
void
halrf_psd(
struct dm_struct *dm,
u32 point,
u32 start_point,
u32 stop_point,
u32 average
)
{
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
u32 i = 0, j = 0, k = 0;
u32 psd_reg, avg_org, point_temp, average_tmp;
u64 data_tatal = 0, data_temp[64] = {0};
psd->buf_size = 256;
if (average == 0)
average_tmp = 1;
else
average_tmp = average;
if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
psd_reg = 0x910;
else
psd_reg = 0x808;
#if 0
dbg_print("[PSD]point=%d, start_point=%d, stop_point=%d, average=%d, average_tmp=%d, buf_size=%d\n",
point, start_point, stop_point, average, average_tmp, psd->buf_size);
#endif
for (i = 0; i < psd->buf_size; i++)
psd->psd_data[i] = 0;
if (dm->support_ic_type & ODM_RTL8710B)
avg_org = odm_get_bb_reg(dm, psd_reg, 0x30000);
else
avg_org = odm_get_bb_reg(dm, psd_reg, 0x3000);
if (average != 0)
{
if (dm->support_ic_type & ODM_RTL8710B)
odm_set_bb_reg(dm, psd_reg, 0x30000, 0x1);
else
odm_set_bb_reg(dm, psd_reg, 0x3000, 0x1);
}
#if 0
if (avg_temp == 0)
avg = 1;
else if (avg_temp == 1)
avg = 8;
else if (avg_temp == 2)
avg = 16;
else if (avg_temp == 3)
avg = 32;
#endif
i = start_point;
while (i < stop_point) {
data_tatal = 0;
if (i >= point)
point_temp = i - point;
else
point_temp = i;
for (k = 0; k < average_tmp; k++) {
data_temp[k] = halrf_get_psd_data(dm, point_temp);
data_tatal = data_tatal + (data_temp[k] * data_temp[k]);
#if 0
if ((k % 20) == 0)
dbg_print("\n ");
dbg_print("0x%x ", data_temp[k]);
#endif
}
/*dbg_print("\n");*/
data_tatal = ((data_tatal * 100) / average_tmp);
psd->psd_data[j] = (u32)_sqrt(data_tatal);
i++;
j++;
}
#if 0
for (i = 0; i < psd->buf_size; i++) {
if ((i % 20) == 0)
dbg_print("\n ");
dbg_print("0x%x ", psd->psd_data[i]);
}
dbg_print("\n\n");
#endif
if (dm->support_ic_type & ODM_RTL8710B)
odm_set_bb_reg(dm, psd_reg, 0x30000, avg_org);
else
odm_set_bb_reg(dm, psd_reg, 0x3000, avg_org);
}
enum rt_status
halrf_psd_init(
struct dm_struct *dm
)
{
enum rt_status ret_status = RT_STATUS_SUCCESS;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
if (psd->psd_progress)
ret_status = RT_STATUS_PENDING;
else {
psd->psd_progress = 1;
halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
psd->psd_progress = 0;
}
return ret_status;
}
enum rt_status
halrf_psd_query(
struct dm_struct *dm,
u32 *outbuf,
u32 buf_size
)
{
enum rt_status ret_status = RT_STATUS_SUCCESS;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
if (psd->psd_progress)
ret_status = RT_STATUS_PENDING;
else
PlatformMoveMemory(outbuf, psd->psd_data, 0x400);
return ret_status;
}
enum rt_status
halrf_psd_init_query(
struct dm_struct *dm,
u32 *outbuf,
u32 point,
u32 start_point,
u32 stop_point,
u32 average,
u32 buf_size
)
{
enum rt_status ret_status = RT_STATUS_SUCCESS;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
psd->point = point;
psd->start_point = start_point;
psd->stop_point = stop_point;
psd->average = average;
if (psd->psd_progress)
ret_status = RT_STATUS_PENDING;
else {
psd->psd_progress = 1;
halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
PlatformMoveMemory(outbuf, psd->psd_data, 0x400);
psd->psd_progress = 0;
}
return ret_status;
}
#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/

60
hal/phydm/halrf/halrf_psd.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HALRF_PSD_H__
#define __HALRF_PSD_H__
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
struct _halrf_psd_data {
u32 point;
u32 start_point;
u32 stop_point;
u32 average;
u32 buf_size;
u32 psd_data[256];
u32 psd_progress;
};
enum rt_status
halrf_psd_init (
struct dm_struct *dm
);
enum rt_status
halrf_psd_query (
struct dm_struct *dm,
u32 *outbuf,
u32 buf_size
);
enum rt_status
halrf_psd_init_query(
struct dm_struct *dm,
u32 *outbuf,
u32 point,
u32 start_point,
u32 stop_point,
u32 average,
u32 buf_size
);
#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/
#endif /*#ifndef __HALRF_PSD_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#include "mp_precomp.h"
#include "phydm_precomp.h"
void odm_bub_sort(pu4Byte data, u4Byte n)
{
int i, j, temp, sp;
for (i = n - 1;i >= 0;i--) {
sp = 1;
for (j = 0;j < i;j++) {
if (data[j] < data[j + 1]) {
temp = data[j];
data[j] = data[j + 1];
data[j + 1] = temp;
sp = 0;
}
}
if (sp == 1)
break;
}
}
#if (RTL8197F_SUPPORT == 1)
u4Byte
odm_tx_gain_gap_psd_8197f(
void *dm_void,
u1Byte rf_path,
u4Byte rf56
)
{
PDM_ODM_T dm = (PDM_ODM_T)dm_void;
u1Byte i, j;
u4Byte psd_vaule[5], psd_avg_time = 5, psd_vaule_temp;
u4Byte iqk_ctl_addr[2][6] = {{0xe30, 0xe34, 0xe50, 0xe54, 0xe38, 0xe3c},
{0xe50, 0xe54, 0xe30, 0xe34, 0xe58, 0xe5c}};
u4Byte psd_finish_bit[2] = {0x04000000, 0x20000000};
u4Byte psd_fail_bit[2] = {0x08000000, 0x40000000};
u4Byte psd_cntl_value[2][2] = {{0x38008c1c, 0x10008c1c},
{0x38008c2c, 0x10008c2c}};
u4Byte psd_report_addr[2] = {0xea0, 0xec0};
odm_set_rf_reg(dm, rf_path, 0xdf, bRFRegOffsetMask, 0x00e02);
ODM_delay_us(100);
odm_set_bb_reg(dm, 0xe28, 0xffffffff, 0x0);
odm_set_rf_reg(dm, rf_path, 0x56, 0xfff, rf56);
while(rf56 != (odm_get_rf_reg(dm, rf_path, 0x56, 0xfff)))
odm_set_rf_reg(dm, rf_path, 0x56, 0xfff, rf56);
odm_set_bb_reg(dm, 0xd94, 0xffffffff, 0x44FFBB44);
odm_set_bb_reg(dm, 0xe70, 0xffffffff, 0x00400040);
odm_set_bb_reg(dm, 0xc04, 0xffffffff, 0x6f005403);
odm_set_bb_reg(dm, 0xc08, 0xffffffff, 0x000804e4);
odm_set_bb_reg(dm, 0x874, 0xffffffff, 0x04203400);
odm_set_bb_reg(dm, 0xe28, 0xffffffff, 0x80800000);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][0], 0xffffffff, psd_cntl_value[rf_path][0]);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][1], 0xffffffff, psd_cntl_value[rf_path][1]);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][2], 0xffffffff, psd_cntl_value[rf_path][0]);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][4], 0xffffffff, 0x8215001F);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][5], 0xffffffff, 0x2805001F);
odm_set_bb_reg(dm, 0xe40, 0xffffffff, 0x81007C00);
odm_set_bb_reg(dm, 0xe44, 0xffffffff, 0x81004800);
odm_set_bb_reg(dm, 0xe4c, 0xffffffff, 0x0046a8d0);
for (i = 0; i < psd_avg_time; i++) {
for(j = 0; j < 1000 ; j++) {
odm_set_bb_reg(dm, 0xe48, 0xffffffff, 0xfa005800);
odm_set_bb_reg(dm, 0xe48, 0xffffffff, 0xf8005800);
while(!odm_get_bb_reg(dm, 0xeac, psd_finish_bit[rf_path])); /*wait finish bit*/
if (!odm_get_bb_reg(dm, 0xeac, psd_fail_bit[rf_path])) { /*check fail bit*/
psd_vaule[i] = odm_get_bb_reg(dm, psd_report_addr[rf_path], 0xffffffff);
if (psd_vaule[i] > 0xffff)
break;
}
}
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x time=%d psd_vaule=0x%x\n",
odm_get_rf_reg(dm, rf_path, 0x0, 0xff),
rf56, odm_get_rf_reg(dm, rf_path, 0x56, 0xfff), j, psd_vaule[i]);
}
odm_bub_sort(psd_vaule, psd_avg_time);
psd_vaule_temp = psd_vaule[(UINT)(psd_avg_time / 2)];
odm_set_bb_reg(dm, 0xd94, 0xffffffff, 0x44BBBB44);
odm_set_bb_reg(dm, 0xe70, 0xffffffff, 0x80408040);
odm_set_bb_reg(dm, 0xc04, 0xffffffff, 0x6f005433);
odm_set_bb_reg(dm, 0xc08, 0xffffffff, 0x000004e4);
odm_set_bb_reg(dm, 0x874, 0xffffffff, 0x04003400);
odm_set_bb_reg(dm, 0xe28, 0xffffffff, 0x00000000);
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x psd_vaule_temp=0x%x\n",
odm_get_rf_reg(dm, rf_path, 0x0, 0xff),
rf56, odm_get_rf_reg(dm, rf_path, 0x56, 0xfff), psd_vaule_temp);
odm_set_rf_reg(dm, rf_path, 0xdf, bRFRegOffsetMask, 0x00602);
return psd_vaule_temp;
}
void
odm_tx_gain_gap_calibration_8197f(
void *dm_void
)
{
PDM_ODM_T dm = (PDM_ODM_T)dm_void;
u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3;
s1Byte delta_gain_gap_pre, delta_gain_gap[2][11];
u4Byte rf56_current, rf56_next, psd_value_current, psd_value_next;
u4Byte psd_gap, rf56_current_temp[2][11];
s4Byte rf33[2][11];
memset(rf33, 0x0, sizeof(rf33));
for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) {
if (rf_path == RF_PATH_A)
odm_set_bb_reg(dm, 0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/
else if (rf_path == RF_PATH_B)
odm_set_bb_reg(dm, 0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/
ODM_delay_us(100);
for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) {
rf0_idx_current = 3 * (rf0_idx - 1) + 1;
odm_set_rf_reg(dm, rf_path, 0x0, 0xff, rf0_idx_current);
ODM_delay_us(100);
rf56_current_temp[rf_path][rf0_idx] = odm_get_rf_reg(dm, rf_path, 0x56, 0xfff);
rf56_current = rf56_current_temp[rf_path][rf0_idx];
rf0_idx_next = 3 * rf0_idx + 1;
odm_set_rf_reg(dm, rf_path, 0x0, 0xff, rf0_idx_next);
ODM_delay_us(100);
rf56_next= odm_get_rf_reg(dm, rf_path, 0x56, 0xfff);
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf56_current[%d][%d]=0x%x rf56_next[%d][%d]=0x%x\n",
rf_path, rf0_idx, rf56_current, rf_path, rf0_idx, rf56_next);
if ((rf56_current >> 5) == (rf56_next >> 5)) {
delta_gain_gap[rf_path][rf0_idx] = 0;
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf56_current[11:5] == rf56_next[%d][%d][11:5]=0x%x delta_gain_gap[%d][%d]=%d\n",
rf_path, rf0_idx, (rf56_next >> 5), rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx]);
continue;
}
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf56_current[%d][%d][11:5]=0x%x != rf56_next[%d][%d][11:5]=0x%x\n",
rf_path, rf0_idx, (rf56_current >> 5), rf_path, rf0_idx, (rf56_next >> 5));
for (i = 0; i < delta_gain_retry; i++) {
psd_value_current = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_current);
psd_value_next = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_next - 2);
psd_gap = psd_value_next / (psd_value_current / 1000);
#if 0
if (psd_gap > 1413)
delta_gain_gap[rf_path][rf0_idx] = 1;
else if (psd_gap > 1122)
delta_gain_gap[rf_path][rf0_idx] = 0;
else
delta_gain_gap[rf_path][rf0_idx] = -1;
#endif
if (psd_gap > 1445)
delta_gain_gap[rf_path][rf0_idx] = 1;
else if (psd_gap > 1096)
delta_gain_gap[rf_path][rf0_idx] = 0;
else
delta_gain_gap[rf_path][rf0_idx] = -1;
if (i == 0)
delta_gain_gap_pre = delta_gain_gap[rf_path][rf0_idx];
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] psd_value_current=0x%x psd_value_next=0x%x psd_value_next/psd_value_current=%d delta_gain_gap[%d][%d]=%d\n",
psd_value_current, psd_value_next, psd_gap, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx]);
if ((i == 0) && (delta_gain_gap[rf_path][rf0_idx] == 0))
break;
if (delta_gain_gap_pre != delta_gain_gap[rf_path][rf0_idx]) {
delta_gain_gap[rf_path][rf0_idx] = 0;
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] delta_gain_gap_pre(%d) != delta_gain_gap[%d][%d](%d) time=%d\n",
delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i);
break;
} else {
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] delta_gain_gap_pre(%d) == delta_gain_gap[%d][%d](%d) time=%d\n",
delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i);
}
}
}
if (rf_path == RF_PATH_A)
odm_set_bb_reg(dm, 0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/
else if (rf_path == RF_PATH_B)
odm_set_bb_reg(dm, 0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/
ODM_delay_us(100);
}
/*odm_set_bb_reg(dm, 0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/
for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) {
odm_set_rf_reg(dm, rf_path, 0xef, bRFRegOffsetMask, 0x00100);
for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) {
rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + (rf56_current_temp[rf_path][rf0_idx] & 0x1f);
for (i = rf0_idx; i <= 10; i++)
rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + delta_gain_gap[rf_path][i];
if (rf33[rf_path][rf0_idx] >= 0x1d)
rf33[rf_path][rf0_idx] = 0x1d;
else if (rf33[rf_path][rf0_idx] <= 0x2)
rf33[rf_path][rf0_idx] = 0x2;
rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + ((rf0_idx - 1) * 0x4000) + (rf56_current_temp[rf_path][rf0_idx] & 0xfffe0);
PHYDM_DBG(dm, ODM_COMP_CALIBRATION,"[TGGC] rf56[%d][%d]=0x%05x rf33[%d][%d]=0x%05x\n", rf_path, rf0_idx, rf56_current_temp[rf_path][rf0_idx], rf_path, rf0_idx, rf33[rf_path][rf0_idx]);
odm_set_rf_reg(dm, rf_path, 0x33, bRFRegOffsetMask, rf33[rf_path][rf0_idx]);
}
odm_set_rf_reg(dm, rf_path, 0xef, bRFRegOffsetMask, 0x00000);
}
}
#endif
void
odm_tx_gain_gap_calibration(
void *dm_void
)
{
PDM_ODM_T dm = (PDM_ODM_T)dm_void;
#if (RTL8197F_SUPPORT == 1)
if (dm->SupportICType & ODM_RTL8197F)
odm_tx_gain_gap_calibration_8197f(dm_void);
#endif
}

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hal/phydm/halrf/halrf_txgapcal.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
void
odm_tx_gain_gap_calibration(
void *dm_void
);

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hal/phydm/halrf/rtl8188e/halrf_8188e_ap.c Normal file
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104
hal/phydm/halrf/rtl8188e/halrf_8188e_ap.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HAL_PHY_RF_8188E_H__
#define __HAL_PHY_RF_8188E_H__
/*--------------------------Define Parameters-------------------------------*/
#define IQK_DELAY_TIME_88E 10 /* ms */
#define index_mapping_NUM_88E 15
#define AVG_THERMAL_NUM_88E 4
#include "../halphyrf_ap.h"
void configure_txpower_track_8188e(
struct txpwrtrack_cfg *config
);
void do_iqk_8188e(
void *dm_void,
u8 delta_thermal_index,
u8 thermal_value,
u8 threshold
);
void
odm_tx_pwr_track_set_pwr88_e(
struct dm_struct *dm,
enum pwrtrack_method method,
u8 rf_path,
u8 channel_mapped_index
);
/* 1 7. IQK */
void
phy_iq_calibrate_8188e(
struct dm_struct *dm,
boolean is_recovery);
/*
* LC calibrate
* */
void
phy_lc_calibrate_8188e(
struct dm_struct *dm
);
/*
* AP calibrate
* */
void
phy_ap_calibrate_8188e(
struct dm_struct *dm,
s8 delta);
void
_phy_save_adda_registers(
struct dm_struct *dm,
u32 *adda_reg,
u32 *adda_backup,
u32 register_num
);
void
_phy_path_adda_on(
struct dm_struct *dm,
u32 *adda_reg,
boolean is_path_a_on,
boolean is2T
);
void
_phy_mac_setting_calibration(
struct dm_struct *dm,
u32 *mac_reg,
u32 *mac_backup
);
void
_phy_path_a_stand_by(
struct dm_struct *dm
);
void
halrf_rf_lna_setting_8188e(
struct dm_struct *dm,
enum phydm_lna_set type
);
#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */

1662
hal/phydm/halrf/rtl8188e/halrf_8188e_ce.c Normal file
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106
hal/phydm/halrf/rtl8188e/halrf_8188e_ce.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HAL_PHY_RF_8188E_H__
#define __HAL_PHY_RF_8188E_H__
/*--------------------------Define Parameters-------------------------------*/
#define IQK_DELAY_TIME_88E 10 /* ms */
#define index_mapping_NUM_88E 15
#define AVG_THERMAL_NUM_88E 4
#include "../halphyrf_ce.h"
void configure_txpower_track_8188e(
struct txpwrtrack_cfg *config
);
void
get_delta_swing_table_8188e(
void *dm_void,
u8 **temperature_up_a,
u8 **temperature_down_a,
u8 **temperature_up_b,
u8 **temperature_down_b
);
void do_iqk_8188e(
void *dm_void,
u8 delta_thermal_index,
u8 thermal_value,
u8 threshold
);
void
odm_tx_pwr_track_set_pwr88_e(
void *dm_void,
enum pwrtrack_method method,
u8 rf_path,
u8 channel_mapped_index
);
/* 1 7. IQK */
void
phy_iq_calibrate_8188e(
void *dm_void,
boolean is_recovery);
/*
* LC calibrate
* */
void
phy_lc_calibrate_8188e(
void *dm_void
);
void
_phy_save_adda_registers(
struct dm_struct *dm,
u32 *adda_reg,
u32 *adda_backup,
u32 register_num
);
void
_phy_path_adda_on(
struct dm_struct *dm,
u32 *adda_reg,
boolean is_path_a_on,
boolean is2T
);
void
_phy_mac_setting_calibration(
struct dm_struct *dm,
u32 *mac_reg,
u32 *mac_backup
);
void
_phy_path_a_stand_by(
struct dm_struct *dm
);
void
halrf_rf_lna_setting_8188e(
struct dm_struct *dm,
enum phydm_lna_set type
);
#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */

1788
hal/phydm/halrf/rtl8188e/halrf_8188e_win.c Normal file
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140
hal/phydm/halrf/rtl8188e/halrf_8188e_win.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HAL_PHY_RF_8188E_H__
#define __HAL_PHY_RF_8188E_H__
/*--------------------------Define Parameters-------------------------------*/
#define IQK_DELAY_TIME_88E 15 /* ms */
#define IQK_DELAY_TIME_8723B 10 /* ms */
#define index_mapping_NUM_88E 15
#define AVG_THERMAL_NUM_88E 4
#if RT_PLATFORM == PLATFORM_MACOSX
#include "halphyrf_win.h"
#else
#include "halrf/halphyrf_win.h"
#endif
void configure_txpower_track_8188e(
struct txpwrtrack_cfg *config
);
void
get_delta_swing_table_8188e(
void *dm_void,
u8 **temperature_up_a,
u8 **temperature_down_a,
u8 **temperature_up_b,
u8 **temperature_down_b
);
void do_iqk_8188e(
void *dm_void,
u8 delta_thermal_index,
u8 thermal_value,
u8 threshold
);
void
odm_tx_pwr_track_set_pwr88_e(
void *dm_void,
enum pwrtrack_method method,
u8 rf_path,
u8 channel_mapped_index
);
/* 1 7. IQK */
void
phy_iq_calibrate_8188e(
void *dm_void,
boolean is_recovery);
/*
* LC calibrate
* */
void
phy_lc_calibrate_8188e(
void *dm_void
);
/*
* AP calibrate
* */
#if 0
void
phy_ap_calibrate_8188e(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
struct dm_struct *dm,
#else
void *adapter,
#endif
s8 delta);
void
phy_digital_predistortion_8188e(void *adapter);
#endif
#define phy_dp_calibrate_8821a phy_dp_calibrate_8812a
void
_phy_save_adda_registers(
struct dm_struct *dm,
u32 *adda_reg,
u32 *adda_backup,
u32 register_num
);
void
_phy_path_adda_on(
struct dm_struct *dm,
u32 *adda_reg,
boolean is_path_a_on,
boolean is2T
);
void
_phy_mac_setting_calibration(
struct dm_struct *dm,
u32 *mac_reg,
u32 *mac_backup
);
void
_phy_path_a_stand_by(
struct dm_struct *dm
);
void phy_set_rf_path_switch_8188e(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
struct dm_struct *dm,
#else
void *adapter,
#endif
boolean is_main
);
void
halrf_rf_lna_setting_8188e(
struct dm_struct *dm,
enum phydm_lna_set type
);
#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */