# Input PCB file (Protel 2.8 ASCII). Override with CLI: python3 capacitors_by_net_pair.py <file>
INPUT_FILE=board.pcb
# Output JSON path. Override with: python3 capacitors_by_net_pair.py -o out.json
OUTPUT_FILE=output/capacitors_by_net_pair.json

# Compare locations: first and second Protel PCB file
FILE1=board_v1.pcb
FILE2=board_v2.pcb
COMPARE_OUTPUT=output/compare_locations.json