diff --git a/tests/sample_protel_ascii.pcb b/tests/sample_protel_ascii.pcb
new file mode 100644
index 0000000..2076638
--- /dev/null
+++ b/tests/sample_protel_ascii.pcb
@@ -0,0 +1,57 @@
+PCB 2.8 ASCII test file - capacitors by net pair
+[DEFAULTS or header - optional]
+
+NET GND
+C1-1
+C2-1
+C3-1
+ENDNET
+
+NET VCC
+C1-2
+C2-2
+ENDNET
+
+NET VDD
+C3-2
+ENDNET
+
+COMP
+C1
+PATTERN 0805
+VALUE 10uF
+PIN 1 GND
+9630 14734 60 16 10 8
+PIN 2 VCC
+9630 14734 60 16 10 8
+ENDCOMP
+
+COMP
+C2
+PATTERN 0805
+VALUE 22uF
+PIN 1 GND
+10000 15000 60 16 10 8
+PIN 2 VCC
+10000 15000 60 16 10 8
+ENDCOMP
+
+COMP
+C3
+PATTERN 0603
+VALUE 1uF
+PIN 1 GND
+11000 16000 60 16 10 8
+PIN 2 VDD
+11000 16000 60 16 10 8
+ENDCOMP
+
+COMP
+R1
+PATTERN 0805
+VALUE 10k
+PIN 1 VCC
+12000 17000 60 16 10 8
+PIN 2 VDD
+12000 17000 60 16 10 8
+ENDCOMP
diff --git a/tests/sample_protel_ascii_rev2.pcb b/tests/sample_protel_ascii_rev2.pcb
new file mode 100644
index 0000000..856b9a8
--- /dev/null
+++ b/tests/sample_protel_ascii_rev2.pcb
@@ -0,0 +1,57 @@
+PCB 2.8 ASCII rev2 - C1 and C2 moved
+[DEFAULTS or header - optional]
+
+NET GND
+C1-1
+C2-1
+C3-1
+ENDNET
+
+NET VCC
+C1-2
+C2-2
+ENDNET
+
+NET VDD
+C3-2
+ENDNET
+
+COMP
+C1
+PATTERN 0805
+VALUE 10uF
+PIN 1 GND
+9700 14800 60 16 10 8
+PIN 2 VCC
+9700 14800 60 16 10 8
+ENDCOMP
+
+COMP
+C2
+PATTERN 0805
+VALUE 22uF
+PIN 1 GND
+10200 15200 60 16 10 8
+PIN 2 VCC
+10200 15200 60 16 10 8
+ENDCOMP
+
+COMP
+C3
+PATTERN 0603
+VALUE 1uF
+PIN 1 GND
+11000 16000 60 16 10 8
+PIN 2 VDD
+11000 16000 60 16 10 8
+ENDCOMP
+
+COMP
+R1
+PATTERN 0805
+VALUE 10k
+PIN 1 VCC
+12000 17000 60 16 10 8
+PIN 2 VDD
+12000 17000 60 16 10 8
+ENDCOMP