Add Rasperry Pi version
This commit is contained in:
commit
ed3dac2ffb
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*.hex
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*.elf
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*.bin
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[submodule "test/usart"]
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path = test/usart
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url = git@git.chch.tech:avr/usart.git
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all: build run
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build:
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g++ -Wall -pthread -o main test/${MODE}/main.cpp src/*.cpp -lpigpio -lrt
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run:
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sudo ./main
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#include "driver.h"
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#include <pigpio.h>
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namespace driver
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{
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namespace {
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Mrf24j *mrf;
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int spi;
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}
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void callback(int gpio, int level, uint32_t tick) {
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mrf->interrupt_handler();
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mrf->check_flags();
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}
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void init(Mrf24j *mrf) {
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gpioInitialise();
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driver::mrf = mrf;
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spi = spiOpen(0, 1000000, 0);
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gpioSetMode(RESET, PI_OUTPUT);
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gpioWrite(RESET, 1);
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gpioSetMode(SPI_CS, PI_OUTPUT);
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cs_high();
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gpioSetAlertFunc(INT, callback);
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}
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uint8_t transfer(uint8_t data) {
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char txbuff[1], rxbuff[1];
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txbuff[0] = data;
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spiXfer(spi, txbuff, rxbuff, 1);
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return rxbuff[0];
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}
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void reset() {
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gpioWrite(RESET , 0);
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time_sleep(0.01);
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gpioWrite(RESET, 1);
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time_sleep(0.02);
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}
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void wake() {
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}
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// INTERRUPT {
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// mrf->interrupt_handler(); // mrf24 object interrupt routine
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// mrf->check_flags();
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// }
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}
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#pragma once
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#include "mrf24j.h"
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#include <pigpio.h>
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#if defined __AVR_ATmega328P__
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#define SPI_DDR DDRB
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#define SPI_PORT PORTB
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#define SPI_SCK PB5
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#define SPI_MISO PB4
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#define SPI_MOSI PB3
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#define SPI_CS PB2
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#define RESET_DDR DDRB
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#define RESET_PORT PORTB
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#define RESET PB0
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#define WAKE_PORT PORTB
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#define WAKE_DDR DDRB
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#define WAKE_PIN PB1
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#define INTERRUPT ISR(INT0_vect)
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#elif defined __AVR_ATmega32__ || defined __AVR_ATmega16__
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#define SPI_PORT PORTB
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#define SPI_DDR DDRB
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#define SPI_SCK PB7
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#define SPI_MOSI PB5
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#define SPI_CS PB4
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#define RESET_DDR DDRB
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#define RESET_PORT PORTB
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#define RESET PB0
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#define WAKE_PORT PORTB
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#define WAKE_DDR DDRB
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#define WAKE_PIN PB1
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#define INTERRUPT ISR(INT2_vect)
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#elif defined RASPBERRYPI
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#endif
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#define RESET 24 //24
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#define SPI_CS 8 //8
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#define INT 2 //25
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namespace driver
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{
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void init(Mrf24j *mrf);
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uint8_t transfer(uint8_t data);
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inline void cs_low() {gpioWrite(SPI_CS, 0);}
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inline void cs_high() {gpioWrite(SPI_CS, 1);}
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void wake();
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void reset();
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} // namespace spi
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/**
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* mrf24j.cpp, Karl Palsson, 2011, karlp@tweak.net.au
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* modified bsd license / apache license
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*/
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#include "mrf24j.h"
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#include "driver.h"
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#include <string.h>
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#include <pigpio.h>
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// aMaxPHYPacketSize = 127, from the 802.15.4-2006 standard.
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static uint8_t rx_buf[127];
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// essential for obtaining the data frame only
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// bytes_MHR = 2 Frame control + 1 sequence number + 2 panid + 2 shortAddr Destination + 2 shortAddr Source
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static int bytes_MHR = 9;
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static int bytes_FCS = 2; // FCS length = 2
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static int bytes_nodata = bytes_MHR + bytes_FCS; // no_data bytes in PHY payload, header length + FCS
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static int ignoreBytes = 0; // bytes to ignore, some modules behaviour.
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static bool bufPHY = false; // flag to buffer all bytes in PHY Payload, or not
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volatile uint8_t flag_got_rx;
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volatile uint8_t flag_got_tx;
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static rx_info_t rx_info;
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static tx_info_t tx_info;
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/**
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* Constructor MRF24J Object.
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*/
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Mrf24j::Mrf24j() {
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driver::init(this);
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}
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void Mrf24j::reset(void) {
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driver::reset();
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}
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void Mrf24j::handlers(void (*rx_handler)(void), void (*tx_handler)(void)) {
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this->rx_handler = rx_handler;
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this->tx_handler = tx_handler;
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}
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byte Mrf24j::read_short(byte address) {
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driver::cs_low();
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// 0 top for short addressing, 0 bottom for read
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driver::transfer(address<<1 & 0b01111110);
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byte ret = driver::transfer(0x00);
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driver::cs_high();
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return ret;
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}
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byte Mrf24j::read_long(word address) {
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driver::cs_low();
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byte ahigh = address >> 3;
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byte alow = address << 5;
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driver::transfer(0x80 | ahigh); // high bit for long
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driver::transfer(alow);
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byte ret = driver::transfer(0);
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driver::cs_high();
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return ret;
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}
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void Mrf24j::write_short(byte address, byte data) {
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driver::cs_low();
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// 0 for top short address, 1 bottom for write
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driver::transfer((address<<1 & 0b01111110) | 0x01);
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driver::transfer(data);
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driver::cs_high();
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}
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void Mrf24j::write_long(word address, byte data) {
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driver::cs_low();
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byte ahigh = address >> 3;
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byte alow = address << 5;
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driver::transfer(0x80 | ahigh); // high bit for long
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driver::transfer(alow | 0x10); // last bit for write
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driver::transfer(data);
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driver::cs_high();
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}
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word Mrf24j::get_pan(void) {
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byte panh = read_short(MRF_PANIDH);
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return panh << 8 | read_short(MRF_PANIDL);
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}
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void Mrf24j::set_pan(word panid) {
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write_short(MRF_PANIDH, panid >> 8);
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write_short(MRF_PANIDL, panid & 0xff);
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}
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void Mrf24j::address16_write(word address16) {
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write_short(MRF_SADRH, address16 >> 8);
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write_short(MRF_SADRL, address16 & 0xff);
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}
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word Mrf24j::address16_read(void) {
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byte a16h = read_short(MRF_SADRH);
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return a16h << 8 | read_short(MRF_SADRL);
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}
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void Mrf24j::send_str(word dest16, char * data) {
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byte len = strlen(data); // get the length of the char* array
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send(dest16, data, len);
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}
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/**
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* Simple send 16, with acks, not much of anything.. assumes src16 and local pan only.
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* @param data
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*/
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void Mrf24j::send(word dest16, char * data, int len) {
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int i = 0;
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write_long(i++, bytes_MHR); // header length
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// +ignoreBytes is because some module seems to ignore 2 bytes after the header?!.
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// default: ignoreBytes = 0;
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write_long(i++, bytes_MHR+ignoreBytes+len);
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// 0 | pan compression | ack | no security | no data pending | data frame[3 bits]
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write_long(i++, 0b01100001); // first byte of Frame Control
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// 16 bit source, 802.15.4 (2003), 16 bit dest,
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write_long(i++, 0b10001000); // second byte of frame control
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write_long(i++, 1); // sequence number 1
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word panid = get_pan();
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write_long(i++, panid & 0xff); // dest panid
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write_long(i++, panid >> 8);
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write_long(i++, dest16 & 0xff); // dest16 low
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write_long(i++, dest16 >> 8); // dest16 high
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word src16 = address16_read();
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write_long(i++, src16 & 0xff); // src16 low
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write_long(i++, src16 >> 8); // src16 high
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// All testing seems to indicate that the next two bytes are ignored.
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//2 bytes on FCS appended by TXMAC
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i+=ignoreBytes;
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for (int q = 0; q < len; q++) {
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write_long(i++, data[q]);
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}
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// ack on, and go!
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write_short(MRF_TXNCON, (1<<MRF_TXNACKREQ | 1<<MRF_TXNTRIG));
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}
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void Mrf24j::set_interrupts(void) {
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// interrupts for rx and tx normal complete
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write_short(MRF_INTCON, 0b11110110);
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}
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/** use the 802.15.4 channel numbers..
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*/
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void Mrf24j::set_channel(byte channel) {
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write_long(MRF_RFCON0, (((channel - 11) << 4) | 0x03));
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}
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void Mrf24j::init(void) {
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// Seems a bit ridiculous when I use reset pin anyway
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write_short(MRF_SOFTRST, 0x7); // from manual
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while (read_short(MRF_SOFTRST) & 0x7 != 0) {
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; // wait for soft reset to finish
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}
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write_short(MRF_PACON2, 0x98); // – Initialize FIFOEN = 1 and TXONTS = 0x6.
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write_short(MRF_TXSTBL, 0x95); // – Initialize RFSTBL = 0x9.
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write_long(MRF_RFCON0, 0x03); // – Initialize RFOPT = 0x03.
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write_long(MRF_RFCON1, 0x01); // – Initialize VCOOPT = 0x02.
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write_long(MRF_RFCON2, 0x80); // – Enable PLL (PLLEN = 1).
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write_long(MRF_RFCON6, 0x90); // – Initialize TXFIL = 1 and 20MRECVR = 1.
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write_long(MRF_RFCON7, 0x80); // – Initialize SLPCLKSEL = 0x2 (100 kHz Internal oscillator).
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write_long(MRF_RFCON8, 0x10); // – Initialize RFVCO = 1.
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write_long(MRF_SLPCON1, 0x21); // – Initialize CLKOUTEN = 1 and SLPCLKDIV = 0x01.
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// Configuration for nonbeacon-enabled devices (see Section 3.8 “Beacon-Enabled and
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// Nonbeacon-Enabled Networks”):
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write_short(MRF_BBREG2, 0x80); // Set CCA mode to ED
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write_short(MRF_CCAEDTH, 0x60); // – Set CCA ED threshold.
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write_short(MRF_BBREG6, 0x40); // – Set appended RSSI value to RXFIFO.
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set_interrupts();
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set_channel(12);
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// max power is by default.. just leave it...
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// Set transmitter power - See “REGISTER 2-62: RF CONTROL 3 REGISTER (ADDRESS: 0x203)”.
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write_short(MRF_RFCTL, 0x04); // – Reset RF state machine.
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write_short(MRF_RFCTL, 0x00); // part 2
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gpioSleep(0, 0, 1000); // delay at least 192usec
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}
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/**
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* Call this from within an interrupt handler connected to the MRFs output
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* interrupt pin. It handles reading in any data from the module, and letting it
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* continue working.
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* Only the most recent data is ever kept.
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*/
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void Mrf24j::interrupt_handler(void) {
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uint8_t last_interrupt = read_short(MRF_INTSTAT);
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if (last_interrupt & MRF_I_RXIF) {
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flag_got_rx++;
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// read out the packet data...
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rx_disable();
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// read start of rxfifo for, has 2 bytes more added by FCS. frame_length = m + n + 2
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uint8_t frame_length = read_long(0x300);
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// buffer all bytes in PHY Payload
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if(bufPHY){
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int rb_ptr = 0;
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for (int i = 0; i < frame_length; i++) { // from 0x301 to (0x301 + frame_length -1)
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rx_buf[rb_ptr++] = read_long(0x301 + i);
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}
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}
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// buffer data bytes
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int rd_ptr = 0;
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// from (0x301 + bytes_MHR) to (0x301 + frame_length - bytes_nodata - 1)
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for (int i = 0; i < rx_datalength(); i++) {
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rx_info.rx_data[rd_ptr++] = read_long(0x301 + bytes_MHR + i);
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}
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rx_info.frame_length = frame_length;
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// same as datasheet 0x301 + (m + n + 2) <-- frame_length
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rx_info.lqi = read_long(0x301 + frame_length);
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// same as datasheet 0x301 + (m + n + 3) <-- frame_length + 1
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rx_info.rssi = read_long(0x301 + frame_length + 1);
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rx_enable();
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}
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if (last_interrupt & MRF_I_TXNIF) {
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flag_got_tx++;
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uint8_t tmp = read_short(MRF_TXSTAT);
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// 1 means it failed, we want 1 to mean it worked.
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tx_info.tx_ok = !(tmp & ~(1 << TXNSTAT));
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tx_info.retries = tmp >> 6;
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tx_info.channel_busy = (tmp & (1 << CCAFAIL));
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}
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}
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/**
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* Call this function periodically, it will invoke your nominated handlers
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*/
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void Mrf24j::check_flags(){
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// TODO - we could check whether the flags are > 1 here, indicating data was lost?
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if (flag_got_rx) {
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flag_got_rx = 0;
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this->rx_handler();
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}
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if (flag_got_tx) {
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flag_got_tx = 0;
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this->tx_handler();
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}
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}
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/**
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* Set RX mode to promiscuous, or normal
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*/
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void Mrf24j::set_promiscuous(boolean enabled) {
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if (enabled) {
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write_short(MRF_RXMCR, 0x01);
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} else {
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write_short(MRF_RXMCR, 0x00);
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}
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}
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rx_info_t * Mrf24j::get_rxinfo(void) {
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return &rx_info;
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}
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tx_info_t * Mrf24j::get_txinfo(void) {
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return &tx_info;
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}
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uint8_t * Mrf24j::get_rxbuf(void) {
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return rx_buf;
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}
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int Mrf24j::rx_datalength(void) {
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return rx_info.frame_length - bytes_nodata;
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}
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void Mrf24j::set_ignoreBytes(int ib) {
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// some modules behaviour
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||||
ignoreBytes = ib;
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||||
}
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||||
/**
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* Set bufPHY flag to buffer all bytes in PHY Payload, or not
|
||||
*/
|
||||
void Mrf24j::set_bufferPHY(boolean bp) {
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bufPHY = bp;
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}
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boolean Mrf24j::get_bufferPHY(void) {
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return bufPHY;
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}
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/**
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* Set PA/LNA external control
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*/
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void Mrf24j::set_palna(boolean enabled) {
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if (enabled) {
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write_long(MRF_TESTMODE, 0x07); // Enable PA/LNA on MRF24J40MB module.
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}else{
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write_long(MRF_TESTMODE, 0x00); // Disable PA/LNA on MRF24J40MB module.
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}
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}
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void Mrf24j::rx_flush(void) {
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write_short(MRF_RXFLUSH, 0x01);
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}
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||||
void Mrf24j::rx_disable(void) {
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write_short(MRF_BBREG1, 0x04); // RXDECINV - disable receiver
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}
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void Mrf24j::rx_enable(void) {
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write_short(MRF_BBREG1, 0x00); // RXDECINV - enable receiver
|
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}
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|
||||
void Mrf24j::enable_wake() {
|
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write_short(MRF_RXFLUSH, 0x60); // Enable WAKE pin and set polarity to active-high
|
||||
write_short(MRF_WAKECON, 0x80); // Enable Immediate Wake-up mode
|
||||
}
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||||
|
||||
void Mrf24j::sleep() {
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||||
write_short(MRF_SOFTRST, 0x04); // Perform a Power Management Reset
|
||||
write_short(MRF_SLPACK, 0x80); // Put MRF24J40 to Sleep immediately
|
||||
}
|
||||
|
||||
void Mrf24j::wake() {
|
||||
driver::wake();
|
||||
write_short(MRF_RFCTL, 0x04); // RF State Machine reset
|
||||
write_short(MRF_RFCTL, 0x00);
|
||||
gpioSleep(0, 0 ,2000); // Delay 2 ms to allow 20 MHz main oscillator time to stabilize before transmitting or receiving.
|
||||
}
|
||||
|
||||
void Mrf24j::turbo() {
|
||||
write_short(MRF_BBREG0, 0x01);
|
||||
write_short(MRF_BBREG3, (1<<5)|(1<<4));
|
||||
write_short(MRF_BBREG4, (1<<6));
|
||||
write_short(MRF_SOFTRST, (1<<1));
|
||||
}
|
||||
|
||||
void Mrf24j::set_power(byte level) {
|
||||
write_short(MRF_RFCON3, level);
|
||||
}
|
||||
|
|
@ -0,0 +1,250 @@
|
|||
/*
|
||||
* File: mrf24j.h
|
||||
* copyright Karl Palsson, karlp@tweak.net.au, 2011
|
||||
* modified BSD License / apache license
|
||||
*/
|
||||
typedef unsigned char uint8_t;
|
||||
|
||||
typedef unsigned char byte;
|
||||
typedef unsigned int word;
|
||||
typedef bool boolean;
|
||||
|
||||
#ifndef LIB_MRF24J_H
|
||||
#define LIB_MRF24J_H
|
||||
|
||||
#define MRF_RXMCR 0x00
|
||||
#define MRF_PANIDL 0x01
|
||||
#define MRF_PANIDH 0x02
|
||||
#define MRF_SADRL 0x03
|
||||
#define MRF_SADRH 0x04
|
||||
#define MRF_EADR0 0x05
|
||||
#define MRF_EADR1 0x06
|
||||
#define MRF_EADR2 0x07
|
||||
#define MRF_EADR3 0x08
|
||||
#define MRF_EADR4 0x09
|
||||
#define MRF_EADR5 0x0A
|
||||
#define MRF_EADR6 0x0B
|
||||
#define MRF_EADR7 0x0C
|
||||
#define MRF_RXFLUSH 0x0D
|
||||
//#define MRF_Reserved 0x0E
|
||||
//#define MRF_Reserved 0x0F
|
||||
#define MRF_ORDER 0x10
|
||||
#define MRF_TXMCR 0x11
|
||||
#define MRF_ACKTMOUT 0x12
|
||||
#define MRF_ESLOTG1 0x13
|
||||
#define MRF_SYMTICKL 0x14
|
||||
#define MRF_SYMTICKH 0x15
|
||||
#define MRF_PACON0 0x16
|
||||
#define MRF_PACON1 0x17
|
||||
#define MRF_PACON2 0x18
|
||||
//#define MRF_Reserved 0x19
|
||||
#define MRF_TXBCON0 0x1A
|
||||
|
||||
// TXNCON: TRANSMIT NORMAL FIFO CONTROL REGISTER (ADDRESS: 0x1B)
|
||||
#define MRF_TXNCON 0x1B
|
||||
#define MRF_TXNTRIG 0
|
||||
#define MRF_TXNSECEN 1
|
||||
#define MRF_TXNACKREQ 2
|
||||
#define MRF_INDIRECT 3
|
||||
#define MRF_FPSTAT 4
|
||||
|
||||
#define MRF_TXG1CON 0x1C
|
||||
#define MRF_TXG2CON 0x1D
|
||||
#define MRF_ESLOTG23 0x1E
|
||||
#define MRF_ESLOTG45 0x1F
|
||||
#define MRF_ESLOTG67 0x20
|
||||
#define MRF_TXPEND 0x21
|
||||
#define MRF_WAKECON 0x22
|
||||
#define MRF_FRMOFFSET 0x23
|
||||
// TXSTAT: TX MAC STATUS REGISTER (ADDRESS: 0x24)
|
||||
#define MRF_TXSTAT 0x24
|
||||
#define TXNRETRY1 7
|
||||
#define TXNRETRY0 6
|
||||
#define CCAFAIL 5
|
||||
#define TXG2FNT 4
|
||||
#define TXG1FNT 3
|
||||
#define TXG2STAT 2
|
||||
#define TXG1STAT 1
|
||||
#define TXNSTAT 0
|
||||
|
||||
#define MRF_TXBCON1 0x25
|
||||
#define MRF_GATECLK 0x26
|
||||
#define MRF_TXTIME 0x27
|
||||
#define MRF_HSYMTMRL 0x28
|
||||
#define MRF_HSYMTMRH 0x29
|
||||
#define MRF_SOFTRST 0x2A
|
||||
//#define MRF_Reserved 0x2B
|
||||
#define MRF_SECCON0 0x2C
|
||||
#define MRF_SECCON1 0x2D
|
||||
#define MRF_TXSTBL 0x2E
|
||||
//#define MRF_Reserved 0x2F
|
||||
#define MRF_RXSR 0x30
|
||||
#define MRF_INTSTAT 0x31
|
||||
#define MRF_INTCON 0x32
|
||||
#define MRF_GPIO 0x33
|
||||
#define MRF_TRISGPIO 0x34
|
||||
#define MRF_SLPACK 0x35
|
||||
#define MRF_RFCTL 0x36
|
||||
#define MRF_SECCR2 0x37
|
||||
#define MRF_BBREG0 0x38
|
||||
#define MRF_BBREG1 0x39
|
||||
#define MRF_BBREG2 0x3A
|
||||
#define MRF_BBREG3 0x3B
|
||||
#define MRF_BBREG4 0x3C
|
||||
//#define MRF_Reserved 0x3D
|
||||
#define MRF_BBREG6 0x3E
|
||||
#define MRF_CCAEDTH 0x3F
|
||||
|
||||
#define MRF_RFCON0 0x200
|
||||
#define MRF_RFCON1 0x201
|
||||
#define MRF_RFCON2 0x202
|
||||
#define MRF_RFCON3 0x203
|
||||
#define MRF_RFCON5 0x205
|
||||
#define MRF_RFCON6 0x206
|
||||
#define MRF_RFCON7 0x207
|
||||
#define MRF_RFCON8 0x208
|
||||
#define MRF_SLPCAL0 0x209
|
||||
#define MRF_SLPCAL1 0x20A
|
||||
#define MRF_SLPCAL2 0x20B
|
||||
#define MRF_RSSI 0x210
|
||||
#define MRF_SLPCON0 0x211
|
||||
#define MRF_SLPCON1 0x220
|
||||
#define MRF_WAKETIMEL 0x222
|
||||
#define MRF_WAKETIMEH 0x223
|
||||
#define MRF_REMCNTL 0x224
|
||||
#define MRF_REMCNTH 0x225
|
||||
#define MRF_MAINCNT0 0x226
|
||||
#define MRF_MAINCNT1 0x227
|
||||
#define MRF_MAINCNT2 0x228
|
||||
#define MRF_MAINCNT3 0x229
|
||||
#define MRF_TESTMODE 0x22F
|
||||
#define MRF_ASSOEADR1 0x231
|
||||
#define MRF_ASSOEADR2 0x232
|
||||
#define MRF_ASSOEADR3 0x233
|
||||
#define MRF_ASSOEADR4 0x234
|
||||
#define MRF_ASSOEADR5 0x235
|
||||
#define MRF_ASSOEADR6 0x236
|
||||
#define MRF_ASSOEADR7 0x237
|
||||
#define MRF_ASSOSADR0 0x238
|
||||
#define MRF_ASSOSADR1 0x239
|
||||
#define MRF_UPNONCE0 0x240
|
||||
#define MRF_UPNONCE1 0x241
|
||||
#define MRF_UPNONCE2 0x242
|
||||
#define MRF_UPNONCE3 0x243
|
||||
#define MRF_UPNONCE4 0x244
|
||||
#define MRF_UPNONCE5 0x245
|
||||
#define MRF_UPNONCE6 0x246
|
||||
#define MRF_UPNONCE7 0x247
|
||||
#define MRF_UPNONCE8 0x248
|
||||
#define MRF_UPNONCE9 0x249
|
||||
#define MRF_UPNONCE10 0x24A
|
||||
#define MRF_UPNONCE11 0x24B
|
||||
#define MRF_UPNONCE12 0x24C
|
||||
|
||||
#define MRF_I_RXIF 0b00001000
|
||||
#define MRF_I_TXNIF 0b00000001
|
||||
|
||||
#define MRF_S_WAKEPOL (1<<6)
|
||||
#define MRF_S_PAKEPAD (1<<5)
|
||||
#define MRF_S_IMMWAKE (1<<8)
|
||||
#define MRF_S_SLPACK (1<<7)
|
||||
#define MRF_S_RFRST (1<<2)
|
||||
|
||||
|
||||
|
||||
|
||||
typedef struct _rx_info_t{
|
||||
uint8_t frame_length;
|
||||
uint8_t rx_data[116]; //max data length = (127 aMaxPHYPacketSize - 2 Frame control - 1 sequence number - 2 panid - 2 shortAddr Destination - 2 shortAddr Source - 2 FCS)
|
||||
uint8_t lqi;
|
||||
uint8_t rssi;
|
||||
} rx_info_t;
|
||||
|
||||
/**
|
||||
* Based on the TXSTAT register, but "better"
|
||||
*/
|
||||
typedef struct _tx_info_t{
|
||||
uint8_t tx_ok:1;
|
||||
uint8_t retries:2;
|
||||
uint8_t channel_busy:1;
|
||||
} tx_info_t;
|
||||
|
||||
class Mrf24j
|
||||
{
|
||||
public:
|
||||
Mrf24j();
|
||||
void reset(void);
|
||||
void init(void);
|
||||
void handlers(void (*rx_handler)(void), void (*tx_handler)(void));
|
||||
|
||||
byte read_short(byte address);
|
||||
byte read_long(word address);
|
||||
|
||||
void write_short(byte address, byte data);
|
||||
void write_long(word address, byte data);
|
||||
|
||||
word get_pan(void);
|
||||
void set_pan(word panid);
|
||||
|
||||
void address16_write(word address16);
|
||||
word address16_read(void);
|
||||
|
||||
void set_interrupts(void);
|
||||
|
||||
void set_promiscuous(boolean enabled);
|
||||
|
||||
/**
|
||||
* Set the channel, using 802.15.4 channel numbers (11..26)
|
||||
*/
|
||||
void set_channel(byte channel);
|
||||
|
||||
void rx_enable(void);
|
||||
void rx_disable(void);
|
||||
|
||||
/** If you want to throw away rx data */
|
||||
void rx_flush(void);
|
||||
|
||||
rx_info_t * get_rxinfo(void);
|
||||
|
||||
tx_info_t * get_txinfo(void);
|
||||
|
||||
uint8_t * get_rxbuf(void);
|
||||
|
||||
int rx_datalength(void);
|
||||
|
||||
void set_ignoreBytes(int ib);
|
||||
|
||||
/**
|
||||
* Set bufPHY flag to buffer all bytes in PHY Payload, or not
|
||||
*/
|
||||
void set_bufferPHY(boolean bp);
|
||||
|
||||
boolean get_bufferPHY(void);
|
||||
|
||||
/**
|
||||
* Set PA/LNA external control
|
||||
*/
|
||||
void set_palna(boolean enabled);
|
||||
|
||||
void send(word dest16, char * data, int len);
|
||||
void send_str(word dest16, char * data);
|
||||
|
||||
void interrupt_handler(void);
|
||||
|
||||
void check_flags();
|
||||
|
||||
void enable_wake();
|
||||
void sleep();
|
||||
void wake();
|
||||
void turbo();
|
||||
void set_power(byte level);
|
||||
|
||||
private:
|
||||
int _pin_reset;
|
||||
int _pin_cs;
|
||||
int _pin_int;
|
||||
void (*rx_handler)(void);
|
||||
void (*tx_handler)(void);
|
||||
};
|
||||
|
||||
#endif /* LIB_MRF24J_H */
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
/**
|
||||
* Example code for using a microchip mrf24j40 module to send and receive
|
||||
* packets using plain 802.15.4
|
||||
* Requirements: 3 pins for spi, 3 pins for reset, chip select and interrupt
|
||||
* notifications
|
||||
* This example file is considered to be in the public domain
|
||||
* Originally written by Karl Palsson, karlp@tweak.net.au, March 2011
|
||||
*/
|
||||
#define F_CPU 8000000UL
|
||||
#include "../../src/mrf24j.h"
|
||||
#include "../usart/src/usart.h"
|
||||
#include <pigpio.h>
|
||||
|
||||
Mrf24j mrf;
|
||||
|
||||
void handle_rx();
|
||||
void handle_tx();
|
||||
|
||||
int main() {
|
||||
mrf.reset();
|
||||
mrf.init();
|
||||
|
||||
mrf.set_pan(0xcafe);
|
||||
mrf.set_bufferPHY(true);
|
||||
// This is _our_ address
|
||||
mrf.address16_write(0x4202);
|
||||
mrf.handlers(&handle_rx, &handle_tx);
|
||||
//mrf.turbo();
|
||||
|
||||
printf("Started");
|
||||
while(1) {
|
||||
printf("Hello\n\r");
|
||||
_delay_ms(2000);
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void handle_rx() {
|
||||
printf("------------------------------------------------------\n\r");
|
||||
printf("received a packet %i bytes long\n\r", mrf.get_rxinfo()->frame_length);
|
||||
|
||||
if(mrf.get_bufferPHY()){
|
||||
printf("Packet data (PHY Payload): ");
|
||||
for (int i = 0; i < mrf.get_rxinfo()->frame_length; i++) {
|
||||
printf("%x", mrf.get_rxbuf()[i]);
|
||||
}
|
||||
}
|
||||
|
||||
printf("\r\nASCII data (relevant data): ");
|
||||
for (int i = 0; i < mrf.rx_datalength(); i++) {
|
||||
putchar(mrf.get_rxinfo()->rx_data[i]);
|
||||
}
|
||||
|
||||
printf("LQI/RSSI=");
|
||||
printf("%i/%i\n\r", mrf.get_rxinfo()->lqi, mrf.get_rxinfo()->rssi);
|
||||
}
|
||||
|
||||
void handle_tx() {
|
||||
if (mrf.get_txinfo()->tx_ok) {
|
||||
printf("TX went ok, got ack\n\r");
|
||||
} else {
|
||||
printf("TX failed after %i retries\n\n\r", mrf.get_txinfo()->retries);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/**
|
||||
* Example code for using a microchip mrf24j40 module to send and receive
|
||||
* packets using plain 802.15.4
|
||||
* Requirements: 3 pins for spi, 3 pins for reset, chip select and interrupt
|
||||
* notifications
|
||||
* This example file is considered to be in the public domain
|
||||
* Originally written by Karl Palsson, karlp@tweak.net.au, March 2011
|
||||
*/
|
||||
|
||||
#define F_CPU 8000000UL
|
||||
#include "../../src/mrf24j.h"
|
||||
#include "../../src/driver.h"
|
||||
#include <stdio.h>
|
||||
#include <pigpio.h>
|
||||
|
||||
|
||||
Mrf24j mrf;
|
||||
int i = 0;
|
||||
|
||||
void handle_rx();
|
||||
void handle_tx();
|
||||
|
||||
int main() {
|
||||
|
||||
mrf.reset();
|
||||
mrf.init();
|
||||
time_sleep(1);
|
||||
|
||||
mrf.set_pan(0xcafe);
|
||||
// This is _our_ address
|
||||
mrf.address16_write(0x4201);
|
||||
mrf.handlers(&handle_rx, &handle_tx);
|
||||
printf("Pan id: %x\n\r", mrf.get_pan());
|
||||
//mrf.enable_wake();
|
||||
//mrf.set_bufferPHY(true);
|
||||
//mrf.turbo();
|
||||
//mrf.set_power(0b1100000);
|
||||
//mrf.sleep();
|
||||
|
||||
printf("Started\n\r");
|
||||
|
||||
char tmp[20];
|
||||
while(1) {
|
||||
printf("txxxing... %i\n\r", i++);
|
||||
//mrf.wake();
|
||||
|
||||
sprintf(tmp,"Received %i\n\r", i);
|
||||
mrf.send_str(0x4202, tmp);
|
||||
|
||||
time_sleep(2);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void handle_rx() {
|
||||
printf("received a packet %i bytes long\n\r", mrf.get_rxinfo()->frame_length);
|
||||
|
||||
if(mrf.get_bufferPHY()){
|
||||
printf("Packet data (PHY Payload):\n\r");
|
||||
for (int i = 0; i < mrf.get_rxinfo()->frame_length; i++) {
|
||||
printf("%i", mrf.get_rxbuf()[i]);
|
||||
}
|
||||
}
|
||||
|
||||
// printf("\r\nASCII data (relevant data):\n\r");
|
||||
// for (int i = 0; i < mrf.rx_datalength(); i++) {
|
||||
// usart::put(mrf.get_rxinfo()->rx_data[i]);
|
||||
// }
|
||||
|
||||
printf("\r\nLQI/RSSI=");
|
||||
printf("%i/%i\n\r", mrf.get_rxinfo()->lqi, mrf.get_rxinfo()->rssi);
|
||||
}
|
||||
|
||||
void handle_tx() {
|
||||
if (mrf.get_txinfo()->tx_ok) {
|
||||
printf("TX went ok, got ack %i\n\r", i);
|
||||
} else {
|
||||
printf("TX failed after %i retries\n\n\r", mrf.get_txinfo()->retries);
|
||||
}
|
||||
printf("Sleeping\n\r");
|
||||
//mrf.sleep();
|
||||
}
|
||||
Loading…
Reference in New Issue