286 lines
10 KiB
C
286 lines
10 KiB
C
//**** ATMEL AVR - A P P L I C A T I O N N O T E ************************
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//*
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//* Title: AVR068 - STK500 Communication Protocol
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//* Filename: command.h
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//* Version: 1.0
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//* Last updated: 10.01.2005
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//*
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//* Support E-mail: avr@atmel.com
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//*
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//**************************************************************************
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// *****************[ STK message constants ]***************************
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#define MESSAGE_START 0x1B //= ESC = 27 decimal
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#define TOKEN 0x0E
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// *****************[ STK general command constants ]**************************
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#define CMD_SIGN_ON 0x01
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#define CMD_SET_PARAMETER 0x02
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#define CMD_GET_PARAMETER 0x03
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#define CMD_SET_DEVICE_PARAMETERS 0x04
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#define CMD_OSCCAL 0x05
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#define CMD_LOAD_ADDRESS 0x06
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#define CMD_FIRMWARE_UPGRADE 0x07
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#define CMD_CHECK_TARGET_CONNECTION 0x0D
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#define CMD_LOAD_RC_ID_TABLE 0x0E
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#define CMD_LOAD_EC_ID_TABLE 0x0F
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// *****************[ STK ISP command constants ]******************************
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#define CMD_ENTER_PROGMODE_ISP 0x10
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#define CMD_LEAVE_PROGMODE_ISP 0x11
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#define CMD_CHIP_ERASE_ISP 0x12
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#define CMD_PROGRAM_FLASH_ISP 0x13
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#define CMD_READ_FLASH_ISP 0x14
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#define CMD_PROGRAM_EEPROM_ISP 0x15
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#define CMD_READ_EEPROM_ISP 0x16
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#define CMD_PROGRAM_FUSE_ISP 0x17
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#define CMD_READ_FUSE_ISP 0x18
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#define CMD_PROGRAM_LOCK_ISP 0x19
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#define CMD_READ_LOCK_ISP 0x1A
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#define CMD_READ_SIGNATURE_ISP 0x1B
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#define CMD_READ_OSCCAL_ISP 0x1C
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#define CMD_SPI_MULTI 0x1D /* STK500v2, AVRISPmkII,
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* JTAGICEmkII */
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#define CMD_SET_SCK 0x1D /* JTAGICE3 */
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#define CMD_GET_SCK 0x1E /* JTAGICE3 */
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// *****************[ STK PP command constants ]*******************************
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#define CMD_ENTER_PROGMODE_PP 0x20
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#define CMD_LEAVE_PROGMODE_PP 0x21
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#define CMD_CHIP_ERASE_PP 0x22
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#define CMD_PROGRAM_FLASH_PP 0x23
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#define CMD_READ_FLASH_PP 0x24
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#define CMD_PROGRAM_EEPROM_PP 0x25
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#define CMD_READ_EEPROM_PP 0x26
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#define CMD_PROGRAM_FUSE_PP 0x27
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#define CMD_READ_FUSE_PP 0x28
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#define CMD_PROGRAM_LOCK_PP 0x29
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#define CMD_READ_LOCK_PP 0x2A
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#define CMD_READ_SIGNATURE_PP 0x2B
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#define CMD_READ_OSCCAL_PP 0x2C
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#define CMD_SET_CONTROL_STACK 0x2D
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// *****************[ STK HVSP command constants ]*****************************
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#define CMD_ENTER_PROGMODE_HVSP 0x30
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#define CMD_LEAVE_PROGMODE_HVSP 0x31
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#define CMD_CHIP_ERASE_HVSP 0x32
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#define CMD_PROGRAM_FLASH_HVSP 0x33
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#define CMD_READ_FLASH_HVSP 0x34
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#define CMD_PROGRAM_EEPROM_HVSP 0x35
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#define CMD_READ_EEPROM_HVSP 0x36
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#define CMD_PROGRAM_FUSE_HVSP 0x37
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#define CMD_READ_FUSE_HVSP 0x38
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#define CMD_PROGRAM_LOCK_HVSP 0x39
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#define CMD_READ_LOCK_HVSP 0x3A
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#define CMD_READ_SIGNATURE_HVSP 0x3B
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#define CMD_READ_OSCCAL_HVSP 0x3C
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// These two are redefined since 0x30/0x31 collide
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// with the STK600 bootloader.
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#define CMD_ENTER_PROGMODE_HVSP_STK600 0x3D
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#define CMD_LEAVE_PROGMODE_HVSP_STK600 0x3E
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// *** XPROG command constants ***
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#define CMD_XPROG 0x50
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#define CMD_XPROG_SETMODE 0x51
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// *** AVR32 JTAG Programming command ***
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#define CMD_JTAG_AVR32 0x80
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#define CMD_ENTER_PROGMODE_JTAG_AVR32 0x81
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#define CMD_LEAVE_PROGMODE_JTAG_AVR32 0x82
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// *** AVR JTAG Programming command ***
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#define CMD_JTAG_AVR 0x90
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// *****************[ STK test command constants ]***************************
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#define CMD_ENTER_TESTMODE 0x60
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#define CMD_LEAVE_TESTMODE 0x61
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#define CMD_CHIP_WRITE 0x62
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#define CMD_PROGRAM_FLASH_PARTIAL 0x63
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#define CMD_PROGRAM_EEPROM_PARTIAL 0x64
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#define CMD_PROGRAM_SIGNATURE_ROW 0x65
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#define CMD_READ_FLASH_MARGIN 0x66
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#define CMD_READ_EEPROM_MARGIN 0x67
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#define CMD_READ_SIGNATURE_ROW_MARGIN 0x68
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#define CMD_PROGRAM_TEST_FUSE 0x69
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#define CMD_READ_TEST_FUSE 0x6A
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#define CMD_PROGRAM_HIDDEN_FUSE_LOW 0x6B
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#define CMD_READ_HIDDEN_FUSE_LOW 0x6C
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#define CMD_PROGRAM_HIDDEN_FUSE_HIGH 0x6D
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#define CMD_READ_HIDDEN_FUSE_HIGH 0x6E
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#define CMD_PROGRAM_HIDDEN_FUSE_EXT 0x6F
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#define CMD_READ_HIDDEN_FUSE_EXT 0x70
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// *****************[ STK status constants ]***************************
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// Success
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#define STATUS_CMD_OK 0x00
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// Warnings
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#define STATUS_CMD_TOUT 0x80
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#define STATUS_RDY_BSY_TOUT 0x81
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#define STATUS_SET_PARAM_MISSING 0x82
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// Errors
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#define STATUS_CMD_FAILED 0xC0
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#define STATUS_CKSUM_ERROR 0xC1
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#define STATUS_CMD_UNKNOWN 0xC9
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#define STATUS_CMD_ILLEGAL_PARAMETER 0xCA
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#define STATUS_PHY_ERROR 0xCB
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#define STATUS_CLOCK_ERROR 0xCC
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#define STATUS_BAUD_INVALID 0xCD
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// Status
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#define STATUS_ISP_READY 0x00
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#define STATUS_CONN_FAIL_SDO 0x01
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#define STATUS_CONN_FAIL_RST 0x02
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#define STATUS_CONN_FAIL_SCK 0x04
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#define STATUS_TGT_NOT_DETECTED 0x10
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#define STATUS_TGT_REVERSE_INSERTED 0x20
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// hw_status
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// Bits in status variable
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// Bit 0-3: Periphery MCU
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// Bit 4-7: Controller MCU
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#define STATUS_AREF_ERROR 0
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// Set to '1' if AREF is short circuited
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#define STATUS_VTG_ERROR 4
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// Set to '1' if VTG is short circuited
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#define STATUS_RC_CARD_ERROR 5
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// Set to '1' if board id changes when board is powered
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#define STATUS_PROGMODE 6
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// Set to '1' if board is in programming mode
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#define STATUS_POWER_SURGE 7
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// Set to '1' if board draws excessive current
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// *****************[ STK parameter constants ]***************************
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#define PARAM_BUILD_NUMBER_LOW 0x80 /* ??? */
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#define PARAM_BUILD_NUMBER_HIGH 0x81 /* ??? */
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#define PARAM_HW_VER 0x90
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#define PARAM_SW_MAJOR 0x91
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#define PARAM_SW_MINOR 0x92
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#define PARAM_VTARGET 0x94
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#define PARAM_VADJUST 0x95 /* STK500 only */
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#define PARAM_OSC_PSCALE 0x96 /* STK500 only */
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#define PARAM_OSC_CMATCH 0x97 /* STK500 only */
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#define PARAM_SCK_DURATION 0x98 /* STK500 only */
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#define PARAM_TOPCARD_DETECT 0x9A /* STK500 only */
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#define PARAM_STATUS 0x9C /* STK500 only */
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#define PARAM_DATA 0x9D /* STK500 only */
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#define PARAM_RESET_POLARITY 0x9E /* STK500 only, and STK600 FW
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* version <= 2.0.3 */
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#define PARAM_CONTROLLER_INIT 0x9F
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/* STK600 parameters */
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#define PARAM_STATUS_TGT_CONN 0xA1
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#define PARAM_DISCHARGEDELAY 0xA4
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#define PARAM_SOCKETCARD_ID 0xA5
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#define PARAM_ROUTINGCARD_ID 0xA6
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#define PARAM_EXPCARD_ID 0xA7
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#define PARAM_SW_MAJOR_PERIPHERY1 0xA8
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#define PARAM_SW_MINOR_PERIPHERY1 0xA9
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#define PARAM_SW_MAJOR_PERIPHERY2 0xAA
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#define PARAM_SW_MINOR_PERIPHERY2 0xAB
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#define PARAM_BOARD_ID_STATUS 0xAD
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#define PARAM_RESET 0xB4
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#define PARAM_JTAG_ALLOW_FULL_PAGE_STREAM 0x50
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#define PARAM_JTAG_EEPROM_PAGE_SIZE 0x52
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#define PARAM_JTAG_DAISY_BITS_BEFORE 0x53
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#define PARAM_JTAG_DAISY_BITS_AFTER 0x54
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#define PARAM_JTAG_DAISY_UNITS_BEFORE 0x55
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#define PARAM_JTAG_DAISY_UNITS_AFTER 0x56
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// *** Parameter constants for 2 byte values ***
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#define PARAM2_SCK_DURATION 0xC0
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#define PARAM2_CLOCK_CONF 0xC1
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#define PARAM2_AREF0 0xC2
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#define PARAM2_AREF1 0xC3
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#define PARAM2_JTAG_FLASH_SIZE_H 0xC5
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#define PARAM2_JTAG_FLASH_SIZE_L 0xC6
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#define PARAM2_JTAG_FLASH_PAGE_SIZE 0xC7
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#define PARAM2_RC_ID_TABLE_REV 0xC8
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#define PARAM2_EC_ID_TABLE_REV 0xC9
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/* STK600 XPROG section */
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// XPROG modes
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#define XPRG_MODE_PDI 0
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#define XPRG_MODE_JTAG 1
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#define XPRG_MODE_TPI 2
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// Write mode flags
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#define XPRG_MEM_WRITE_ERASE 0
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#define XPRG_MEM_WRITE_WRITE 1
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// CRC types
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#define XPRG_CRC_APP 1
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#define XPRG_CRC_BOOT 2
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#define XPRG_CRC_FLASH 3
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// *****************[ STK answer constants ]***************************
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#define ANSWER_CKSUM_ERROR 0xB0
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/*
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* Private data for this programmer.
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*/
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struct pdata
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{
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/*
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* See stk500pp_read_byte() for an explanation of the flash and
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* EEPROM page caches.
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*/
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unsigned char *flash_pagecache;
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unsigned long flash_pageaddr;
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unsigned int flash_pagesize;
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unsigned char *eeprom_pagecache;
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unsigned long eeprom_pageaddr;
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unsigned int eeprom_pagesize;
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unsigned char command_sequence;
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enum
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{
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PGMTYPE_UNKNOWN,
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PGMTYPE_STK500,
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PGMTYPE_AVRISP,
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PGMTYPE_AVRISP_MKII,
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PGMTYPE_JTAGICE_MKII,
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PGMTYPE_STK600,
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PGMTYPE_JTAGICE3
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}
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pgmtype;
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const AVRPART *lastpart;
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/* Start address of Xmega boot area */
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unsigned long boot_start;
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/*
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* Chained pdata for the JTAG ICE mkII backend. This is used when
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* calling the backend functions for ISP/HVSP/PP programming
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* functionality of the JTAG ICE mkII and AVR Dragon.
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*/
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void *chained_pdata;
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};
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