385 lines
17 KiB
C
385 lines
17 KiB
C
/*
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* avrdude - A Downloader/Uploader for AVR device programmers
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* Copyright (C) 2005, 2006 Joerg Wunsch <j@uriah.heep.sax.de>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* $Id$ */
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/*
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* JTAG ICE mkII definitions
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* Taken from Appnote AVR067
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*/
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#if !defined(JTAGMKII_PRIVATE_EXPORTED)
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/*
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* Communication with the JTAG ICE works in frames. The protocol
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* somewhat resembles the STK500v2 protocol, yet it is sufficiently
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* different to prevent a direct code reuse. :-(
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*
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* Frame format:
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*
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* +---------------------------------------------------------------+
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* | 0 | 1 . 2 | 3 . 4 . 5 . 6 | 7 | ... | N-1 . N |
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* | | | | | | |
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* | start | LSB MSB | LSB ....... MSB | token | msg | LSB MSB |
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* | 0x1B | sequence# | message size | 0x0E | | CRC16 |
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* +---------------------------------------------------------------+
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*
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* Each request message will be returned by a response with a matching
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* sequence #. Sequence # 0xffff is reserved for asynchronous event
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* notifications that will be sent by the ICE without a request
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* message (e.g. when the target hit a breakpoint).
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*
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* The message size excludes the framing overhead (10 bytes).
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*
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* The first byte of the message is always the request or response
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* code, which is roughly classified as:
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*
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* . Messages (commands) use 0x00 through 0x3f. (The documentation
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* claims that messages start at 0x01, but actually CMND_SIGN_OFF is
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* 0x00.)
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* . Internal commands use 0x40 through 0x7f (not documented).
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* . Success responses use 0x80 through 0x9f.
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* . Failure responses use 0xa0 through 0xbf.
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* . Events use 0xe0 through 0xff.
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*/
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#define MESSAGE_START 0x1b
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#define TOKEN 0x0e
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/*
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* Max message size we are willing to accept. Prevents us from trying
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* to allocate too much VM in case we received a nonsensical packet
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* length. We have to allocate the buffer as soon as we've got the
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* length information (and thus have to trust that information by that
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* time at first), as the final CRC check can only be done once the
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* entire packet came it.
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*/
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#define MAX_MESSAGE 100000
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#endif /* JTAGMKII_PRIVATE_EXPORTED */
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/* ICE command codes */
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#define CMND_SIGN_OFF 0x00
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#define CMND_GET_SIGN_ON 0x01
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#define CMND_SET_PARAMETER 0x02
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#define CMND_GET_PARAMETER 0x03
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#define CMND_WRITE_MEMORY 0x04
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#define CMND_READ_MEMORY 0x05
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#define CMND_WRITE_PC 0x06
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#define CMND_READ_PC 0x07
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#define CMND_GO 0x08
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#define CMND_SINGLE_STEP 0x09
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#define CMND_FORCED_STOP 0x0A
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#define CMND_RESET 0x0B
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#define CMND_SET_DEVICE_DESCRIPTOR 0x0C
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#define CMND_ERASEPAGE_SPM 0x0D
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#define CMND_GET_SYNC 0x0f
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#define CMND_SELFTEST 0x10
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#define CMND_SET_BREAK 0x11
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#define CMND_GET_BREAK 0x12
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#define CMND_CHIP_ERASE 0x13
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#define CMND_ENTER_PROGMODE 0x14
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#define CMND_LEAVE_PROGMODE 0x15
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#define CMND_SET_N_PARAMETERS 0x16
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#define CMND_CLR_BREAK 0x1A
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#define CMND_RUN_TO_ADDR 0x1C
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#define CMND_SPI_CMD 0x1D
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#define CMND_CLEAR_EVENTS 0x22
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#define CMND_RESTORE_TARGET 0x23
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#define CMND_GET_IR 0x24
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#define CMND_GET_xxx 0x25
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#define CMND_WRITE_SAB 0x28
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#define CMND_READ_SAB 0x29
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#define CMND_RESET_AVR 0x2B
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#define CMND_READ_MEMORY32 0x2C
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#define CMND_WRITE_MEMORY32 0x2D
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#define CMND_ISP_PACKET 0x2F
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#define CMND_XMEGA_ERASE 0x34
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#define CMND_SET_XMEGA_PARAMS 0x36 // undocumented in AVR067
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/* ICE responses */
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#define RSP_OK 0x80
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#define RSP_PARAMETER 0x81
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#define RSP_MEMORY 0x82
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#define RSP_GET_BREAK 0x83
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#define RSP_PC 0x84
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#define RSP_SELFTEST 0x85
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#define RSP_SIGN_ON 0x86
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#define RSP_SPI_DATA 0x88
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#define RSP_FAILED 0xA0
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#define RSP_ILLEGAL_PARAMETER 0xA1
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#define RSP_ILLEGAL_MEMORY_TYPE 0xA2
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#define RSP_ILLEGAL_MEMORY_RANGE 0xA3
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#define RSP_ILLEGAL_EMULATOR_MODE 0xA4
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#define RSP_ILLEGAL_MCU_STATE 0xA5
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#define RSP_ILLEGAL_VALUE 0xA6
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#define RSP_SET_N_PARAMETERS 0xA7
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#define RSP_ILLEGAL_BREAKPOINT 0xA8
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#define RSP_ILLEGAL_JTAG_ID 0xA9
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#define RSP_ILLEGAL_COMMAND 0xAA
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#define RSP_NO_TARGET_POWER 0xAB
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#define RSP_DEBUGWIRE_SYNC_FAILED 0xAC
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#define RSP_ILLEGAL_POWER_STATE 0xAD
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/* ICE events */
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#define EVT_BREAK 0xE0
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#define EVT_RUN 0xE1
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#define EVT_ERROR_PHY_FORCE_BREAK_TIMEOUT 0xE2
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#define EVT_ERROR_PHY_RELEASE_BREAK_TIMEOUT 0xE3
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#define EVT_TARGET_POWER_ON 0xE4
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#define EVT_TARGET_POWER_OFF 0xE5
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#define EVT_DEBUG 0xE6
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#define EVT_EXT_RESET 0xE7
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#define EVT_TARGET_SLEEP 0xE8
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#define EVT_TARGET_WAKEUP 0xE9
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#define EVT_ICE_POWER_ERROR_STATE 0xEA
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#define EVT_ICE_POWER_OK 0xEB
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#define EVT_IDR_DIRTY 0xEC
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#define EVT_ERROR_PHY_MAX_BIT_LENGTH_DIFF 0xED
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#define EVT_NONE 0xEF
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#define EVT_ERROR_PHY_SYNC_TIMEOUT 0xF0
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#define EVT_PROGRAM_BREAK 0xF1
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#define EVT_PDSB_BREAK 0xF2
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#define EVT_PDSMB_BREAK 0xF3
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#define EVT_ERROR_PHY_SYNC_TIMEOUT_BAUD 0xF4
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#define EVT_ERROR_PHY_SYNC_OUT_OF_RANGE 0xF5
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#define EVT_ERROR_PHY_SYNC_WAIT_TIMEOUT 0xF6
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#define EVT_ERROR_PHY_RECEIVE_TIMEOUT 0xF7
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#define EVT_ERROR_PHY_RECEIVED_BREAK 0xF8
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#define EVT_ERROR_PHY_OPT_RECEIVE_TIMEOUT 0xF9
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#define EVT_ERROR_PHY_OPT_RECEIVED_BREAK 0xFA
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#define EVT_RESULT_PHY_NO_ACTIVITY 0xFB
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/* memory types for CMND_{READ,WRITE}_MEMORY */
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#define MTYPE_IO_SHADOW 0x30 /* cached IO registers? */
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#define MTYPE_SRAM 0x20 /* target's SRAM or [ext.] IO registers */
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#define MTYPE_EEPROM 0x22 /* EEPROM, what way? */
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#define MTYPE_EVENT 0x60 /* ICE event memory */
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#define MTYPE_SPM 0xA0 /* flash through LPM/SPM */
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#define MTYPE_FLASH_PAGE 0xB0 /* flash in programming mode */
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#define MTYPE_EEPROM_PAGE 0xB1 /* EEPROM in programming mode */
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#define MTYPE_FUSE_BITS 0xB2 /* fuse bits in programming mode */
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#define MTYPE_LOCK_BITS 0xB3 /* lock bits in programming mode */
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#define MTYPE_SIGN_JTAG 0xB4 /* signature in programming mode */
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#define MTYPE_OSCCAL_BYTE 0xB5 /* osccal cells in programming mode */
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#define MTYPE_CAN 0xB6 /* CAN mailbox */
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#define MTYPE_FLASH 0xc0 /* xmega (app.) flash - undocumented in AVR067 */
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#define MTYPE_BOOT_FLASH 0xc1 /* xmega boot flash - undocumented in AVR067 */
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#define MTYPE_USERSIG 0xc5 /* xmega user signature - undocumented in AVR067 */
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#define MTYPE_PRODSIG 0xc6 /* xmega production signature - undocumented in AVR067 */
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/* (some) ICE parameters, for CMND_{GET,SET}_PARAMETER */
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#define PAR_HW_VERSION 0x01
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#define PAR_FW_VERSION 0x02
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#define PAR_EMULATOR_MODE 0x03
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# define EMULATOR_MODE_DEBUGWIRE 0x00
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# define EMULATOR_MODE_JTAG 0x01
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# define EMULATOR_MODE_HV 0x02 /* HVSP or PP mode of AVR Dragon */
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# define EMULATOR_MODE_SPI 0x03
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# define EMULATOR_MODE_JTAG_AVR32 0x04
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# define EMULATOR_MODE_JTAG_XMEGA 0x05
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# define EMULATOR_MODE_PDI 0x06
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#define PAR_IREG 0x04
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#define PAR_BAUD_RATE 0x05
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# define PAR_BAUD_2400 0x01
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# define PAR_BAUD_4800 0x02
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# define PAR_BAUD_9600 0x03
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# define PAR_BAUD_19200 0x04 /* default */
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# define PAR_BAUD_38400 0x05
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# define PAR_BAUD_57600 0x06
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# define PAR_BAUD_115200 0x07
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# define PAR_BAUD_14400 0x08
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#define PAR_OCD_VTARGET 0x06
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#define PAR_OCD_JTAG_CLK 0x07
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#define PAR_OCD_BREAK_CAUSE 0x08
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#define PAR_TIMERS_RUNNING 0x09
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#define PAR_BREAK_ON_CHANGE_FLOW 0x0A
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#define PAR_BREAK_ADDR1 0x0B
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#define PAR_BREAK_ADDR2 0x0C
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#define PAR_COMBBREAKCTRL 0x0D
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#define PAR_JTAGID 0x0E
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#define PAR_UNITS_BEFORE 0x0F
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#define PAR_UNITS_AFTER 0x10
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#define PAR_BIT_BEFORE 0x11
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#define PAR_BIT_ATER 0x12
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#define PAR_EXTERNAL_RESET 0x13
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#define PAR_FLASH_PAGE_SIZE 0x14
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#define PAR_EEPROM_PAGE_SIZE 0x15
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#define PAR_UNUSED1 0x16
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#define PAR_PSB0 0x17
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#define PAR_PSB1 0x18
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#define PAR_PROTOCOL_DEBUG_EVENT 0x19
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#define PAR_MCU_STATE 0x1A
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# define STOPPED 0x00
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# define RUNNING 0x01
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# define PROGRAMMING 0x02
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#define PAR_DAISY_CHAIN_INFO 0x1B
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#define PAR_BOOT_ADDRESS 0x1C
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#define PAR_TARGET_SIGNATURE 0x1D
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#define PAR_DEBUGWIRE_BAUDRATE 0x1E
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#define PAR_PROGRAM_ENTRY_POINT 0x1F
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#define PAR_PDI_OFFSET_START 0x32
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#define PAR_PDI_OFFSET_END 0x33
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#define PAR_PACKET_PARSING_ERRORS 0x40
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#define PAR_VALID_PACKETS_RECEIVED 0x41
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#define PAR_INTERCOMMUNICATION_TX_FAILURES 0x42
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#define PAR_INTERCOMMUNICATION_RX_FAILURES 0x43
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#define PAR_CRC_ERRORS 0x44
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#define PAR_POWER_SOURCE 0x45
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# define POWER_EXTERNAL 0x00
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# define POWER_USB 0x01
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#define PAR_CAN_FLAG 0x22
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# define DONT_READ_CAN_MAILBOX 0x00
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# define READ_CAN_MAILBOX 0x01
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#define PAR_ENABLE_IDR_IN_RUN_MODE 0x23
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# define ACCESS_OSCCAL 0x00
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# define ACCESS_IDR 0x01
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#define PAR_ALLOW_PAGEPROGRAMMING_IN_SCANCHAIN 0x24
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# define PAGEPROG_NOT_ALLOWED 0x00
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# define PAGEPROG_ALLOWED 0x01
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/* Xmega erase memory types, for CMND_XMEGA_ERASE */
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#define XMEGA_ERASE_CHIP 0x00
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#define XMEGA_ERASE_APP 0x01
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#define XMEGA_ERASE_BOOT 0x02
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#define XMEGA_ERASE_EEPROM 0x03
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#define XMEGA_ERASE_APP_PAGE 0x04
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#define XMEGA_ERASE_BOOT_PAGE 0x05
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#define XMEGA_ERASE_EEPROM_PAGE 0x06
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#define XMEGA_ERASE_USERSIG 0x07
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/* AVR32 related definitions */
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#define AVR32_FLASHC_FCR 0xFFFE1400
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#define AVR32_FLASHC_FCMD 0xFFFE1404
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#define AVR32_FLASHC_FCMD_KEY 0xA5000000
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#define AVR32_FLASHC_FCMD_WRITE_PAGE 1
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#define AVR32_FLASHC_FCMD_ERASE_PAGE 2
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#define AVR32_FLASHC_FCMD_CLEAR_PAGE_BUFFER 3
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#define AVR32_FLASHC_FCMD_LOCK 4
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#define AVR32_FLASHC_FCMD_UNLOCK 5
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#define AVR32_FLASHC_FSR 0xFFFE1408
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#define AVR32_FLASHC_FSR_RDY 0x00000001
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#define AVR32_FLASHC_FSR_ERR 0x00000008
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#define AVR32_FLASHC_FGPFRHI 0xFFFE140C
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#define AVR32_FLASHC_FGPFRLO 0xFFFE1410
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#define AVR32_DC 0x00000008
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#define AVR32_DS 0x00000010
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#define AVR32_DINST 0x00000104
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#define AVR32_DCCPU 0x00000110
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#define AVR32_DCEMU 0x00000114
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#define AVR32_DCSR 0x00000118
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#define AVR32_DC_ABORT 0x80000000
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#define AVR32_DC_RESET 0x40000000
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#define AVR32_DC_DBE 0x00002000
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#define AVR32_DC_DBR 0x00001000
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#define AVR32_RESET_READ 0x0001
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#define AVR32_RESET_WRITE 0x0002
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#define AVR32_RESET_CHIP_ERASE 0x0004
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#define AVR32_SET4RUNNING 0x0008
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//#define AVR32_RESET_COMMON (AVR32_RESET_READ | AVR32_RESET_WRITE | AVR32_RESET_CHIP_ERASE )
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#if !defined(JTAGMKII_PRIVATE_EXPORTED)
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/*
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* In appnote AVR067, struct device_descriptor is written with
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* int/long field types. We cannot use them directly, as they were
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* neither properly aligned for portability, nor did they care for
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* endianess issues. We thus use arrays of unsigned chars, plus
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* conversion macros.
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*/
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struct device_descriptor
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{
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unsigned char ucReadIO[8]; /*LSB = IOloc 0, MSB = IOloc63 */
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unsigned char ucReadIOShadow[8]; /*LSB = IOloc 0, MSB = IOloc63 */
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unsigned char ucWriteIO[8]; /*LSB = IOloc 0, MSB = IOloc63 */
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unsigned char ucWriteIOShadow[8]; /*LSB = IOloc 0, MSB = IOloc63 */
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unsigned char ucReadExtIO[52]; /*LSB = IOloc 96, MSB = IOloc511 */
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unsigned char ucReadIOExtShadow[52]; /*LSB = IOloc 96, MSB = IOloc511 */
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unsigned char ucWriteExtIO[52]; /*LSB = IOloc 96, MSB = IOloc511 */
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unsigned char ucWriteIOExtShadow[52];/*LSB = IOloc 96, MSB = IOloc511 */
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unsigned char ucIDRAddress; /*IDR address */
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unsigned char ucSPMCRAddress; /*SPMCR Register address and dW BasePC */
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unsigned char ucRAMPZAddress; /*RAMPZ Register address in SRAM I/O */
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/*space */
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unsigned char uiFlashPageSize[2]; /*Device Flash Page Size, Size = */
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/*2 exp ucFlashPageSize */
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unsigned char ucEepromPageSize; /*Device Eeprom Page Size in bytes */
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unsigned char ulBootAddress[4]; /*Device Boot Loader Start Address */
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unsigned char uiUpperExtIOLoc[2]; /*Topmost (last) extended I/O */
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/*location, 0 if no external I/O */
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unsigned char ulFlashSize[4]; /*Device Flash Size */
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unsigned char ucEepromInst[20]; /*Instructions for W/R EEPROM */
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unsigned char ucFlashInst[3]; /*Instructions for W/R FLASH */
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unsigned char ucSPHaddr; /* stack pointer high */
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unsigned char ucSPLaddr; /* stack pointer low */
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/* new as of 16-02-2004 */
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unsigned char uiFlashpages[2]; /* number of pages in flash */
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unsigned char ucDWDRAddress; /* DWDR register address */
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unsigned char ucDWBasePC; /* base/mask value of the PC */
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/* new as of 30-04-2004 */
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unsigned char ucAllowFullPageBitstream; /* FALSE on ALL new */
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/*parts */
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unsigned char uiStartSmallestBootLoaderSection[2]; /* */
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/* new as of 18-10-2004 */
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unsigned char EnablePageProgramming; /* For JTAG parts only, */
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/* default TRUE */
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unsigned char ucCacheType; /* CacheType_Normal 0x00, */
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/* CacheType_CAN 0x01, */
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/* CacheType_HEIMDALL 0x02 */
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/* new as of 27-10-2004 */
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unsigned char uiSramStartAddr[2]; /* Start of SRAM */
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unsigned char ucResetType; /* Selects reset type. ResetNormal = 0x00 */
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/* ResetAT76CXXX = 0x01 */
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unsigned char ucPCMaskExtended; /* For parts with extended PC */
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unsigned char ucPCMaskHigh; /* PC high mask */
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unsigned char ucEindAddress; /* Selects reset type. [EIND address...] */
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/* new as of early 2005, firmware 4.x */
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unsigned char EECRAddress[2]; /* EECR memory-mapped IO address */
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};
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/* New Xmega device descriptor, for firmware version 7 and above */
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struct xmega_device_desc {
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unsigned char whatever[2]; // cannot guess; must be 0x0002
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unsigned char datalen; // length of the following data, = 47
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unsigned char nvm_app_offset[4]; // NVM offset for application flash
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unsigned char nvm_boot_offset[4]; // NVM offset for boot flash
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unsigned char nvm_eeprom_offset[4]; // NVM offset for EEPROM
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unsigned char nvm_fuse_offset[4]; // NVM offset for fuses
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unsigned char nvm_lock_offset[4]; // NVM offset for lock bits
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unsigned char nvm_user_sig_offset[4]; // NVM offset for user signature row
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unsigned char nvm_prod_sig_offset[4]; // NVM offset for production sign. row
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unsigned char nvm_data_offset[4]; // NVM offset for data memory (SRAM + IO)
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unsigned char app_size[4]; // size of application flash
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unsigned char boot_size[2]; // size of boot flash
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unsigned char flash_page_size[2]; // flash page size
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unsigned char eeprom_size[2]; // size of EEPROM
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unsigned char eeprom_page_size; // EEPROM page size
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unsigned char nvm_base_addr[2]; // IO space base address of NVM controller
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unsigned char mcu_base_addr[2]; // IO space base address of MCU control
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};
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#endif /* JTAGMKII_PRIVATE_EXPORTED */
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/* return code from jtagmkII_getsync() to indicate a "graceful"
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* failure, i.e. an attempt to enable ISP failed and should be
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* eventually retried */
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#define JTAGII_GETSYNC_FAIL_GRACEFUL (-2)
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