471 lines
21 KiB
C
471 lines
21 KiB
C
/*
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* avrdude - A Downloader/Uploader for AVR device programmers
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* Copyright (C) 2012 Joerg Wunsch <j@uriah.heep.sax.de>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* $Id$ */
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/*
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* JTAGICE3 definitions
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* Reverse-engineered from various USB traces.
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*/
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#if !defined(JTAG3_PRIVATE_EXPORTED)
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/*
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* Communication with the JTAGICE3 uses three data endpoints:
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*
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* Endpoint 0x01 (OUT) and 0x82 (IN) are the usual conversation
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* endpoints, with a maximal packet size of 512 octets. The
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* JTAGICE3 does *not* work on older USB 1.1 hubs that would only
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* allow for 64-octet max packet size.
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*
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* Endpoint 0x83 (IN) is also a bulk endpoint, with a max packetsize
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* of 64 octets. This endpoint is used by the ICE to deliver events
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* from the ICE.
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*
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* The request (host -> ICE, EP 0x01) format is:
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*
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* +---------------------------------------------
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* | 0 | 1 | 2 . 3 | 4 | 5 | 6 | ...
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* | | | | | | |
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* | token |dummy|serial# |scope| cmd |dummy| optional data
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* | 0x0e | 0 | NNNN | SS | CC | 0 | ...
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* +---------------------------------------------
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*
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* Both dummy bytes are always 0. The "scope" identifier appears
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* to distinguish commands (responses, events, parameters) roughly:
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*
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* 0x01 - general scope ("hello", "goodbye", firmware info, target
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* voltage readout)
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* 0x11 - scope for AVR in ISP mode (basically a wrapper around
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* the AVRISPmkII commands, as usual)
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* 0x12 - scope for AVR (JTAG, PDI, debugWIRE)
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*
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* The serial number is counted up.
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*
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*
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* The response (ICE -> host, EP 0x82) format is:
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*
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* +--------------------------------------------------+
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* | 0 | 1 . 2 | 3 | 4 | ... | N |
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* | | | | | | |
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* | token |serial# |scope| rsp | optional data |dummy|
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* | 0x0e | NNNN | SS | RR | ... | 0 |
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* +--------------------------------------------------+
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*
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* The response's serial number is mirrored from the request, but the
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* dummy byte before the serial number is left out. However, another
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* zero dummy byte is always attached to the end of the response data.
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* Response codes are similar to the JTAGICEmkII, 0x80 is a generic
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* "OK" response, other responses above 0x80 indicate various data
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* responses (parameter read, memory read, PC value), and 0xa0 is a
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* generic "failure" response. It appears the failure response gets
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* another byte appended (probably indicating the reason) after the
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* 0 dummy byte, but there's not enough analysis material so far.
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*
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*
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* The event format (EP 0x83) is:
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*
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* +----------------------------------------
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* | 0 | 1 | 2 . 3 | 4 | 5 | ...
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* | | | | | |
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* | token |dummy|serial# |scope| evt | data
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* | 0x0e | 0 | NNNN | SS | EV | ...
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* +----------------------------------------
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*/
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#define TOKEN 0x0e
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#endif /* JTAG3_PRIVATE_EXPORTED */
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#define SCOPE_INFO 0x00
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#define SCOPE_GENERAL 0x01
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#define SCOPE_AVR_ISP 0x11
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#define SCOPE_AVR 0x12
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#define SCOPE_AVR_TPI 0x14
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/* Info scope */
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#define CMD3_GET_INFO 0x00
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/* byte after GET_INFO is always 0, next is: */
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# define CMD3_INFO_NAME 0x80 /* JTAGICE3 */
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# define CMD3_INFO_SERIAL 0x81 /* J3xxxxxxxxxx */
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/* Generic scope */
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#define CMD3_SET_PARAMETER 0x01
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#define CMD3_GET_PARAMETER 0x02
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#define CMD3_SIGN_ON 0x10
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#define CMD3_SIGN_OFF 0x11 /* takes one parameter? */
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#define CMD3_GET_ID 0x12
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#define CMD3_START_DW_DEBUG 0x13
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#define CMD3_MONCON_DISABLE 0x17
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/* AVR ISP scope: no commands of its own */
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/* AVR scope */
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//#define CMD3_SET_PARAMETER 0x01
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//#define CMD3_GET_PARAMETER 0x02
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//#define CMD3_SIGN_ON 0x10 /* an additional signon/-off pair */
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//#define CMD3_SIGN_OFF 0x11
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#define CMD3_ENTER_PROGMODE 0x15
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#define CMD3_LEAVE_PROGMODE 0x16
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#define CMD3_ERASE_MEMORY 0x20
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#define CMD3_READ_MEMORY 0x21
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#define CMD3_WRITE_MEMORY 0x23
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#define CMD3_READ_PC 0x35
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/* ICE responses */
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#define RSP3_OK 0x80
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#define RSP3_INFO 0x81
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#define RSP3_PC 0x83
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#define RSP3_DATA 0x84
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#define RSP3_FAILED 0xA0
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#define RSP3_STATUS_MASK 0xE0
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/* possible failure codes that could be appended to RSP3_FAILED: */
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# define RSP3_FAIL_DEBUGWIRE 0x10
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# define RSP3_FAIL_PDI 0x1B
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# define RSP3_FAIL_NO_ANSWER 0x20
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# define RSP3_FAIL_NO_TARGET_POWER 0x22
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# define RSP3_FAIL_WRONG_MODE 0x32 /* progmode vs. non-prog */
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# define RSP3_FAIL_UNSUPP_MEMORY 0x34 /* unsupported memory type */
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# define RSP3_FAIL_WRONG_LENGTH 0x35 /* wrong lenth for mem access */
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# define RSP3_FAIL_CRC_FAILURE 0x43 /* CRC failure in device */
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# define RSP3_FAIL_OCD_LOCKED 0x44 /* device is locked */
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# define RSP3_FAIL_NOT_UNDERSTOOD 0x91
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/* ICE events */
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#define EVT3_BREAK 0x40 /* AVR scope */
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#define EVT3_SLEEP 0x11 /* General scope, also wakeup */
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#define EVT3_POWER 0x10 /* General scope */
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/* memory types */
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#define MTYPE_SRAM 0x20 /* target's SRAM or [ext.] IO registers */
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#define MTYPE_EEPROM 0x22 /* EEPROM, what way? */
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#define MTYPE_SPM 0xA0 /* flash through LPM/SPM */
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#define MTYPE_FLASH_PAGE 0xB0 /* flash in programming mode */
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#define MTYPE_EEPROM_PAGE 0xB1 /* EEPROM in programming mode */
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#define MTYPE_FUSE_BITS 0xB2 /* fuse bits in programming mode */
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#define MTYPE_LOCK_BITS 0xB3 /* lock bits in programming mode */
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#define MTYPE_SIGN_JTAG 0xB4 /* signature in programming mode */
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#define MTYPE_OSCCAL_BYTE 0xB5 /* osccal cells in programming mode */
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#define MTYPE_FLASH 0xc0 /* xmega (app.) flash - undocumented in AVR067 */
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#define MTYPE_BOOT_FLASH 0xc1 /* xmega boot flash - undocumented in AVR067 */
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#define MTYPE_EEPROM_XMEGA 0xc4 /* xmega EEPROM in debug mode - undocumented in AVR067 */
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#define MTYPE_USERSIG 0xc5 /* xmega user signature - undocumented in AVR067 */
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#define MTYPE_PRODSIG 0xc6 /* xmega production signature - undocumented in AVR067 */
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#define MTYPE_SIB 0xD3 /* AVR8X System Information Block */
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/*
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* SET and GET context definitions
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*/
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#define SET_GET_CTXT_CONFIG 0x00 /* Configuration */
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#define SET_GET_CTXT_PHYSICAL 0x01 /* Physical interface related */
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#define SET_GET_CTXT_DEVICE 0x02 /* Device specific settings */
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#define SET_GET_CTXT_OPTIONS 0x03 /* Option-related settings */
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#define SET_GET_CTXT_SESSION 0x04 /* Session-related settings */
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/*
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* Parameters are divided into sections, where the section number
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* precedes each parameter address. There are distinct parameter
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* sets for generic and AVR scope.
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*/
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#define PARM3_HW_VER 0x00 /* section 0, generic scope, 1 byte */
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#define PARM3_FW_MAJOR 0x01 /* section 0, generic scope, 1 byte */
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#define PARM3_FW_MINOR 0x02 /* section 0, generic scope, 1 byte */
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#define PARM3_FW_RELEASE 0x03 /* section 0, generic scope, 1 byte;
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* always asked for by Atmel Studio,
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* but never displayed there */
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#define PARM3_VTARGET 0x00 /* section 1, generic scope, 2 bytes, in millivolts */
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#define PARM3_VBUF 0x01 /* section 1, generic scope, 2 bytes, bufferred target voltage reference */
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#define PARM3_VUSB 0x02 /* section 1, generic scope, 2 bytes, USB voltage */
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#define PARM3_ANALOG_A_CURRENT 0x10 /* section 1, generic scope, 2 bytes, Ch A current in milliamps, Powerdebugger only */
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#define PARM3_ANALOG_A_VOLTAGE 0x11 /* section 1, generic scope, 2 bytes, Ch A voltage in millivolts, Powerdebugger only */
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#define PARM3_ANALOG_B_CURRENT 0x12 /* section 1, generic scope, 2 bytes, Ch B current in milliamps, Powerdebugger only */
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#define PARM3_ANALOG_B_VOLTAGE 0x13 /* section 1, generic scope, 2 bytes, Ch V voltage in millivolts, Powerdebugger only */
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#define PARM3_TSUP_VOLTAGE_MEAS 0x14 /* section 1, generic scope, 2 bytes, target voltage measurement in millivolts */
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#define PARM3_USB_VOLTAGE_MEAS 0x15 /* section 1, generic scope, 2 bytes, USB voltage measurement in millivolts */
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#define PARM3_VADJUST 0x20 /* section 1, generic scope, 2 bytes, set voltage in millivolts */
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#define PARM3_ANALOG_STATUS 0x30 /* section 1, generic scope, 2 bytes, analog status */
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#define PARM3_DEVICEDESC 0x00 /* section 2, memory etc. configuration,
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* 31 bytes for tiny/mega AVR, 47 bytes
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* for Xmega; is also used in command
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* 0x36 in JTAGICEmkII, starting with
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* firmware 7.x */
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#define PARM3_ARCH 0x00 /* section 0, AVR scope, 1 byte */
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# define PARM3_ARCH_TINY 1 /* also small megaAVR with ISP/DW only */
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# define PARM3_ARCH_MEGA 2
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# define PARM3_ARCH_XMEGA 3
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# define PARM3_ARCH_UPDI 5 /* AVR devices with UPDI i/f */
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#define PARM3_SESS_PURPOSE 0x01 /* section 0, AVR scope, 1 byte */
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# define PARM3_SESS_PROGRAMMING 1
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# define PARM3_SESS_DEBUGGING 2
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#define PARM3_CONNECTION 0x00 /* section 1, AVR scope, 1 byte */
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# define PARM3_CONN_ISP 1
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# define PARM3_CONN_JTAG 4
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# define PARM3_CONN_DW 5
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# define PARM3_CONN_PDI 6
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# define PARM3_CONN_UPDI 8
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#define PARM3_JTAGCHAIN 0x01 /* JTAG chain info, AVR scope (units
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* before/after, bits before/after), 4
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* bytes */
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/*
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* Physical context parameters
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*/
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#define PARM3_CLK_MEGA_PROG 0x20 /* section 1, AVR scope, 2 bytes (kHz) */
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#define PARM3_CLK_MEGA_DEBUG 0x21 /* section 1, AVR scope, 2 bytes (kHz) */
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#define PARM3_CLK_XMEGA_JTAG 0x30 /* section 1, AVR scope, 2 bytes (kHz) */
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#define PARM3_CLK_XMEGA_PDI 0x31 /* section 1, AVR scope, 2 bytes (kHz) */
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/*
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* Options context parameters
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*/
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#define PARM3_OPT_12V_UPDI_ENABLE 0x06
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#define PARM3_OPT_CHIP_ERASE_TO_ENTER 0x07
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/*
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* UPDI high-voltage enable modes
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*/
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#define PARM3_UPDI_HV_NONE 0x00 /* Do not use high-voltage */
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#define PARM3_UPDI_HV_SIMPLE_PULSE 0x01 /* Issue a single high-voltage pulse immediately*/
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#define PARM3_UPDI_HV_AUTO_POWER_TOGGLE 0x02 /* Toggle power automatically and then apply a high-voltage pulse */
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#define PARM3_UPDI_HV_USER_POWER_TOGGLE 0x03 /* The user toggles power, and the tool applies a high-voltage pulse on power-up */
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/* Xmega erase memory types, for CMND_XMEGA_ERASE */
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#define XMEGA_ERASE_CHIP 0x00
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#define XMEGA_ERASE_APP 0x01
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#define XMEGA_ERASE_BOOT 0x02
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#define XMEGA_ERASE_EEPROM 0x03
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#define XMEGA_ERASE_APP_PAGE 0x04
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#define XMEGA_ERASE_BOOT_PAGE 0x05
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#define XMEGA_ERASE_EEPROM_PAGE 0x06
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#define XMEGA_ERASE_USERSIG 0x07
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/* EDBG vendor commands */
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#define EDBG_VENDOR_AVR_CMD 0x80
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#define EDBG_VENDOR_AVR_RSP 0x81
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#define EDBG_VENDOR_AVR_EVT 0x82
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/* CMSIS-DAP commands */
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#define CMSISDAP_CMD_INFO 0x00 /* get info, followed by INFO byte */
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# define CMSISDAP_INFO_VID 0x01 /* vendor ID (string) */
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# define CMSISDAP_INFO_PID 0x02 /* product ID (string) */
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# define CMSISDAP_INFO_SERIAL 0x03 /* serial number (string) */
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# define CMSISDAP_INFO_FIRMWARE 0x04 /* firmware version (string) */
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# define CMSISDAP_INFO_TARGET_VENDOR 0x05 /* target device vendor (string) */
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# define CMSISDAP_INFO_TARGET_NAME 0x06 /* target device name (string) */
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# define CMSISDAP_INFO_CAPABILITIES 0xF0 /* debug unit capabilities (byte) */
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# define CMSISDAP_INFO_PACKET_COUNT 0xFE /* packet count (byte) (which packets, anyway?) */
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# define CMSISDAP_INFO_PACKET_SIZE 0xFF /* packet size (short) */
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#define CMSISDAP_CMD_LED 0x01 /* LED control, followed by LED number and on/off byte */
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# define CMSISDAP_LED_CONNECT 0x00 /* connect LED */
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# define CMSISDAP_LED_RUNNING 0x01 /* running LED */
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#define CMSISDAP_CMD_CONNECT 0x02 /* connect to target, followed by DAP mode */
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# define CMSISDAP_CONN_DEFAULT 0x00
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# define CMSISDAP_CONN_SWD 0x01 /* serial wire debug */
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# define CMSISDAP_CONN_JTAG 0x02 /* JTAG mode */
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#define CMSISDAP_CMD_DISCONNECT 0x03 /* disconnect from target */
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#define CMSISDAP_XFR_CONFIGURE 0x04 /* configure transfers; idle cycles (byte);
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wait retry (short); match retry (short) */
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#define CMSISDAP_CMD_WRITEAPBORT 0x08 /* write to CoreSight ABORT register of target */
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#define CMSISDAP_CMD_DELAY 0x09 /* delay for number of microseconds (short) */
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#define CMSISDAP_CMD_RESET 0x0A /* reset target */
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#define CMSISDAP_CMD_SWJ_CLOCK 0x11 /* SWD/JTAG clock, (word) */
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#define CMSISDAP_CMD_SWD_CONFIGURE 0x13 /* configure SWD protocol; (byte) */
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#define DEFAULT_MINIMUM_CHARACTERISED_DIV1_VOLTAGE_MV 4500 // Default minimum voltage for 32M => 4.5V
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#define DEFAULT_MINIMUM_CHARACTERISED_DIV2_VOLTAGE_MV 2700 // Default minimum voltage for 16M => 2.7V
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#define DEFAULT_MINIMUM_CHARACTERISED_DIV4_VOLTAGE_MV 2200 // Default minimum voltage for 8M => 2.2V
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#define DEFAULT_MINIMUM_CHARACTERISED_DIV8_VOLTAGE_MV 1500 // Default minimum voltage for 4M => 1.5V
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#define MAX_FREQUENCY_DEDICATED_UPDI_PIN 1500
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#define MAX_FREQUENCY_SHARED_UPDI_PIN 750
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#define UPDI_ADDRESS_MODE_16BIT 0
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#define UPDI_ADDRESS_MODE_24BIT 1
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#define FUSES_SYSCFG0_OFFSET 5
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// TPI Protocol commands
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#define XPRG_CMD_ENTER_PROGMODE 0x01
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#define XPRG_CMD_LEAVE_PROGMODE 0x02
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#define XPRG_CMD_ERASE 0x03
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#define XPRG_CMD_WRITE_MEM 0x04
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#define XPRG_CMD_READ_MEM 0x05
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#define XPRG_CMD_CRC 0x06
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#define XPRG_CMD_SET_PARAM 0x07
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// TPI Protocol responses
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// Success
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#define XPRG_ERR_OK 0x00
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// Errors
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#define XPRG_ERR_FAILED 0x01
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#define XPRG_ERR_COLLISION 0x02
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#define XPRG_ERR_TIMEOUT 0x03
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#define XPRG_ERR_ILLEGAL_PARAM 0x04
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#define XPRG_ERR_UNKNOWN_COMMAND 0x10
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// TPI Memory types
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#define XPRG_MEM_TYPE_APPL 0x01
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#define XPRG_MEM_TYPE_BOOT 0x02
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#define XPRG_MEM_TYPE_EEPROM 0x03
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#define XPRG_MEM_TYPE_FUSE 0x04
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#define XPRG_MEM_TYPE_LOCKBITS 0x05
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#define XPRG_MEM_TYPE_USERSIG 0x06
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#define XPRG_MEM_TYPE_FACTORY_CALIBRATION 0x07
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// TPI Erase modes
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#define XPRG_ERASE_CHIP 0x01
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#define XPRG_ERASE_APP 0x02
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#define XPRG_ERASE_BOOT 0x03
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#define XPRG_ERASE_EEPROM 0x04
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#define XPRG_ERASE_APP_PAGE 0x05
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#define XPRG_ERASE_BOOT_PAGE 0x06
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#define XPRG_ERASE_EEPROM_PAGE 0x07
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#define XPRG_ERASE_USERSIG 0x08
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// Erase types for Tiny XPROG
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#define XPRG_ERASE_CONFIG 0x09
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// TPI Parameters
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// XPROG parameters of different sizes
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// 4-byte address
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#define XPRG_PARAM_NVMBASE 0x01
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// 2-byte page size
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#define XPRG_PARAM_EEPPAGESIZE 0x02
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// tiny TPI, 1-byte address
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#define XPRG_PARAM_NVMCMD_ADDR 0x03
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#define XPRG_PARAM_NVMCSR_ADDR 0x04
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#define TPI_NVMCMD_ADDRESS 0x33
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#define TPI_NVMCSR_ADDRESS 0x32
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#if !defined(JTAG3_PRIVATE_EXPORTED)
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struct mega_device_desc {
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unsigned char flash_page_size[2]; // in bytes
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unsigned char flash_size[4]; // in bytes
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unsigned char dummy1[4]; // always 0
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unsigned char boot_address[4]; // maximal (BOOTSZ = 3) bootloader
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// address, in 16-bit words (!)
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unsigned char sram_offset[2]; // pointing behind IO registers
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unsigned char eeprom_size[2];
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unsigned char eeprom_page_size;
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unsigned char ocd_revision; // see XML; basically:
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// t13*, t2313*, t4313: 0
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// all other DW devices: 1
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// ATmega128(A): 1 (!)
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// ATmega16*,162,169*,32*,64*: 2
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// ATmega2560/2561: 4
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// all other megaAVR devices: 3
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unsigned char always_one; // always = 1
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unsigned char allow_full_page_bitstream; // old AVRs, see XML
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unsigned char dummy2[2]; // always 0
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// all IO addresses below are given
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// in IO number space (without
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// offset 0x20), even though e.g.
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// OSCCAL always resides outside
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unsigned char idr_address; // IDR, aka. OCDR
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unsigned char eearh_address; // EEPROM access
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unsigned char eearl_address;
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unsigned char eecr_address;
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unsigned char eedr_address;
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unsigned char spmcr_address;
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unsigned char osccal_address;
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};
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/* Xmega device descriptor */
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struct xmega_device_desc {
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unsigned char nvm_app_offset[4]; // NVM offset for application flash
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unsigned char nvm_boot_offset[4]; // NVM offset for boot flash
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unsigned char nvm_eeprom_offset[4]; // NVM offset for EEPROM
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unsigned char nvm_fuse_offset[4]; // NVM offset for fuses
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unsigned char nvm_lock_offset[4]; // NVM offset for lock bits
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unsigned char nvm_user_sig_offset[4]; // NVM offset for user signature row
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unsigned char nvm_prod_sig_offset[4]; // NVM offset for production sign. row
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unsigned char nvm_data_offset[4]; // NVM offset for data memory (SRAM + IO)
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unsigned char app_size[4]; // size of application flash
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unsigned char boot_size[2]; // size of boot flash
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unsigned char flash_page_size[2]; // flash page size
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unsigned char eeprom_size[2]; // size of EEPROM
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unsigned char eeprom_page_size; // EEPROM page size
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unsigned char nvm_base_addr[2]; // IO space base address of NVM controller
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unsigned char mcu_base_addr[2]; // IO space base address of MCU control
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};
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/* UPDI device descriptor */
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struct updi_device_desc {
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unsigned char prog_base[2];
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unsigned char flash_page_size;
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unsigned char eeprom_page_size;
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unsigned char nvm_base_addr[2];
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unsigned char ocd_base_addr[2];
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// Configuration below, except for "Extended memory support", is only used by kits with
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// embedded debuggers (XPlained, Curiosity, ...).
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unsigned char default_min_div1_voltage[2]; // Default minimum voltage for 32M => 4.5V -> 4500
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unsigned char default_min_div2_voltage[2]; // Default minimum voltage for 16M => 2.7V -> 2700
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unsigned char default_min_div4_voltage[2]; // Default minimum voltage for 8M => 2.2V -> 2200
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unsigned char default_min_div8_voltage[2]; // Default minimum voltage for 4M => 1.5V -> 1500
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unsigned char pdi_pad_fmax[2]; // 750
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unsigned char flash_bytes[4]; // Flash size in bytes
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unsigned char eeprom_bytes[2]; // EEPROM size in bytes
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unsigned char user_sig_bytes[2]; // UserSignture size in bytes
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unsigned char fuses_bytes; // Fuses size in bytes
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unsigned char syscfg_offset; // Offset of SYSCFG0 within FUSE space
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unsigned char syscfg_write_mask_and; // AND mask to apply to SYSCFG0 when writing
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unsigned char syscfg_write_mask_or; // OR mask to apply to SYSCFG0 when writing
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unsigned char syscfg_erase_mask_and; // AND mask to apply to SYSCFG0 after erase
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unsigned char syscfg_erase_mask_or; // OR mask to apply to SYSCFG0 after erase
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unsigned char eeprom_base[2]; // Base address for EEPROM memory
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unsigned char user_sig_base[2]; // Base address for UserSignature memory
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unsigned char signature_base[2]; // Base address for Signature memory
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unsigned char fuses_base[2]; // Base address for Fuses memory
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unsigned char lockbits_base[2]; // Base address for Lockbits memory
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unsigned char device_id[2]; // Two last bytes of the device ID
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// Extended memory support. Needed for flash >= 64kb
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unsigned char prog_base_msb; // Extends prog_base, used in 24-bit mode
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unsigned char flash_page_size_msb; // Extends flash_page_size, used in 24-bit mode
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unsigned char address_mode; // 0x00 = 16-bit mode, 0x01 = 24-bit mode
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unsigned char hvupdi_variant; // Indicates the target UPDI HV implementation
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};
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#endif /* JTAG3_PRIVATE_EXPORTED */
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