Sort commands, response codes and events into numerical order.
git-svn-id: svn://svn.savannah.nongnu.org/avrdude/trunk@1076 81a1dc3b-b13d-400b-aceb-764788c761c2
This commit is contained in:
Joerg Wunsch
parent
566adf1e2d
commit
7bf57779e0
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2012-03-30 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
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* jtagmkII_private.h: Sort commands, response codes and events
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into numerical order.
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2012-03-29 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
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bug #30451: Accessing some Xmega memory sections gives not
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@ -75,194 +75,193 @@
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#endif /* JTAGMKII_PRIVATE_EXPORTED */
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/* ICE command codes */
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#define CMND_CHIP_ERASE 0x13
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#define CMND_CLEAR_EVENTS 0x22
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#define CMND_CLR_BREAK 0x1A
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#define CMND_ENTER_PROGMODE 0x14
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#define CMND_ERASEPAGE_SPM 0x0D
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#define CMND_FORCED_STOP 0x0A
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#define CMND_GET_BREAK 0x12
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#define CMND_GET_PARAMETER 0x03
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#define CMND_GET_SIGN_ON 0x01
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#define CMND_GET_SYNC 0x0f
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#define CMND_GO 0x08
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#define CMND_ISP_PACKET 0x2F
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#define CMND_LEAVE_PROGMODE 0x15
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#define CMND_READ_MEMORY 0x05
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#define CMND_READ_PC 0x07
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#define CMND_RESET 0x0B
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#define CMND_RESTORE_TARGET 0x23
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#define CMND_RUN_TO_ADDR 0x1C
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#define CMND_SELFTEST 0x10
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#define CMND_SET_BREAK 0x11
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#define CMND_SIGN_OFF 0x00
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#define CMND_GET_SIGN_ON 0x01
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#define CMND_SET_PARAMETER 0x02
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#define CMND_GET_PARAMETER 0x03
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#define CMND_WRITE_MEMORY 0x04
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#define CMND_READ_MEMORY 0x05
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#define CMND_WRITE_PC 0x06
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#define CMND_READ_PC 0x07
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#define CMND_GO 0x08
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#define CMND_SINGLE_STEP 0x09
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#define CMND_FORCED_STOP 0x0A
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#define CMND_RESET 0x0B
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#define CMND_SET_DEVICE_DESCRIPTOR 0x0C
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#define CMND_SET_N_PARAMETERS 0x16
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#define CMND_SET_PARAMETER 0x02
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#define CMND_SIGN_OFF 0x00
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#define CMND_SINGLE_STEP 0x09
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#define CMND_SPI_CMD 0x1D
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#define CMND_WRITE_MEMORY 0x04
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#define CMND_WRITE_PC 0x06
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#define CMND_XMEGA_ERASE 0x34
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// AVR32 - DFH
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#define CMND_GET_IR 0x24
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#define CMND_GET_xxx 0x25
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#define CMND_WRITE_SAB 0x28
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#define CMND_READ_SAB 0x29
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#define CMND_RESET_AVR 0x2B
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#define CMND_READ_MEMORY32 0x2C
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#define CMND_WRITE_MEMORY32 0x2D
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#define CMND_ERASEPAGE_SPM 0x0D
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#define CMND_GET_SYNC 0x0f
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#define CMND_SELFTEST 0x10
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#define CMND_SET_BREAK 0x11
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#define CMND_GET_BREAK 0x12
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#define CMND_CHIP_ERASE 0x13
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#define CMND_ENTER_PROGMODE 0x14
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#define CMND_LEAVE_PROGMODE 0x15
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#define CMND_SET_N_PARAMETERS 0x16
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#define CMND_CLR_BREAK 0x1A
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#define CMND_RUN_TO_ADDR 0x1C
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#define CMND_SPI_CMD 0x1D
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#define CMND_CLEAR_EVENTS 0x22
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#define CMND_RESTORE_TARGET 0x23
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#define CMND_GET_IR 0x24
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#define CMND_GET_xxx 0x25
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#define CMND_WRITE_SAB 0x28
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#define CMND_READ_SAB 0x29
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#define CMND_RESET_AVR 0x2B
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#define CMND_READ_MEMORY32 0x2C
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#define CMND_WRITE_MEMORY32 0x2D
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#define CMND_ISP_PACKET 0x2F
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#define CMND_XMEGA_ERASE 0x34
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/* ICE responses */
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#define RSP_DEBUGWIRE_SYNC_FAILED 0xAC
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#define RSP_FAILED 0xA0
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#define RSP_GET_BREAK 0x83
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#define RSP_ILLEGAL_BREAKPOINT 0xA8
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#define RSP_ILLEGAL_COMMAND 0xAA
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#define RSP_ILLEGAL_EMULATOR_MODE 0xA4
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#define RSP_ILLEGAL_JTAG_ID 0xA9
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#define RSP_ILLEGAL_MCU_STATE 0xA5
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#define RSP_ILLEGAL_MEMORY_TYPE 0xA2
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#define RSP_ILLEGAL_MEMORY_RANGE 0xA3
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#define RSP_ILLEGAL_PARAMETER 0xA1
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#define RSP_ILLEGAL_POWER_STATE 0xAD
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#define RSP_ILLEGAL_VALUE 0xA6
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#define RSP_MEMORY 0x82
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#define RSP_NO_TARGET_POWER 0xAB
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#define RSP_OK 0x80
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#define RSP_PARAMETER 0x81
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#define RSP_PC 0x84
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#define RSP_SELFTEST 0x85
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#define RSP_SET_N_PARAMETERS 0xA7
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#define RSP_SIGN_ON 0x86
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#define RSP_SPI_DATA 0x88
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#define RSP_OK 0x80
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#define RSP_PARAMETER 0x81
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#define RSP_MEMORY 0x82
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#define RSP_GET_BREAK 0x83
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#define RSP_PC 0x84
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#define RSP_SELFTEST 0x85
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#define RSP_SIGN_ON 0x86
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#define RSP_SPI_DATA 0x88
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#define RSP_FAILED 0xA0
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#define RSP_ILLEGAL_PARAMETER 0xA1
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#define RSP_ILLEGAL_MEMORY_TYPE 0xA2
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#define RSP_ILLEGAL_MEMORY_RANGE 0xA3
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#define RSP_ILLEGAL_EMULATOR_MODE 0xA4
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#define RSP_ILLEGAL_MCU_STATE 0xA5
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#define RSP_ILLEGAL_VALUE 0xA6
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#define RSP_SET_N_PARAMETERS 0xA7
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#define RSP_ILLEGAL_BREAKPOINT 0xA8
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#define RSP_ILLEGAL_JTAG_ID 0xA9
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#define RSP_ILLEGAL_COMMAND 0xAA
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#define RSP_NO_TARGET_POWER 0xAB
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#define RSP_DEBUGWIRE_SYNC_FAILED 0xAC
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#define RSP_ILLEGAL_POWER_STATE 0xAD
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/* ICE events */
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#define EVT_BREAK 0xE0
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#define EVT_DEBUG 0xE6
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#define EVT_ERROR_PHY_FORCE_BREAK_TIMEOUT 0xE2
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#define EVT_ERROR_PHY_MAX_BIT_LENGTH_DIFF 0xED
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#define EVT_ERROR_PHY_OPT_RECEIVE_TIMEOUT 0xF9
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#define EVT_ERROR_PHY_OPT_RECEIVED_BREAK 0xFA
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#define EVT_ERROR_PHY_RECEIVED_BREAK 0xF8
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#define EVT_ERROR_PHY_RECEIVE_TIMEOUT 0xF7
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#define EVT_BREAK 0xE0
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#define EVT_RUN 0xE1
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#define EVT_ERROR_PHY_FORCE_BREAK_TIMEOUT 0xE2
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#define EVT_ERROR_PHY_RELEASE_BREAK_TIMEOUT 0xE3
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#define EVT_ERROR_PHY_SYNC_OUT_OF_RANGE 0xF5
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#define EVT_ERROR_PHY_SYNC_TIMEOUT 0xF0
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#define EVT_ERROR_PHY_SYNC_TIMEOUT_BAUD 0xF4
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#define EVT_ERROR_PHY_SYNC_WAIT_TIMEOUT 0xF6
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#define EVT_RESULT_PHY_NO_ACTIVITY 0xFB
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#define EVT_EXT_RESET 0xE7
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#define EVT_ICE_POWER_ERROR_STATE 0xEA
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#define EVT_ICE_POWER_OK 0xEB
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#define EVT_IDR_DIRTY 0xEC
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#define EVT_NONE 0xEF
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#define EVT_PDSB_BREAK 0xF2
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#define EVT_PDSMB_BREAK 0xF3
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#define EVT_PROGRAM_BREAK 0xF1
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#define EVT_RUN 0xE1
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#define EVT_TARGET_POWER_OFF 0xE5
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#define EVT_TARGET_POWER_ON 0xE4
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#define EVT_TARGET_SLEEP 0xE8
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#define EVT_TARGET_WAKEUP 0xE9
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#define EVT_TARGET_POWER_ON 0xE4
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#define EVT_TARGET_POWER_OFF 0xE5
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#define EVT_DEBUG 0xE6
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#define EVT_EXT_RESET 0xE7
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#define EVT_TARGET_SLEEP 0xE8
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#define EVT_TARGET_WAKEUP 0xE9
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#define EVT_ICE_POWER_ERROR_STATE 0xEA
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#define EVT_ICE_POWER_OK 0xEB
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#define EVT_IDR_DIRTY 0xEC
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#define EVT_ERROR_PHY_MAX_BIT_LENGTH_DIFF 0xED
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#define EVT_NONE 0xEF
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#define EVT_ERROR_PHY_SYNC_TIMEOUT 0xF0
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#define EVT_PROGRAM_BREAK 0xF1
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#define EVT_PDSB_BREAK 0xF2
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#define EVT_PDSMB_BREAK 0xF3
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#define EVT_ERROR_PHY_SYNC_TIMEOUT_BAUD 0xF4
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#define EVT_ERROR_PHY_SYNC_OUT_OF_RANGE 0xF5
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#define EVT_ERROR_PHY_SYNC_WAIT_TIMEOUT 0xF6
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#define EVT_ERROR_PHY_RECEIVE_TIMEOUT 0xF7
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#define EVT_ERROR_PHY_RECEIVED_BREAK 0xF8
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#define EVT_ERROR_PHY_OPT_RECEIVE_TIMEOUT 0xF9
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#define EVT_ERROR_PHY_OPT_RECEIVED_BREAK 0xFA
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#define EVT_RESULT_PHY_NO_ACTIVITY 0xFB
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/* memory types for CMND_{READ,WRITE}_MEMORY */
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#define MTYPE_IO_SHADOW 0x30 /* cached IO registers? */
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#define MTYPE_SRAM 0x20 /* target's SRAM or [ext.] IO registers */
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#define MTYPE_EEPROM 0x22 /* EEPROM, what way? */
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#define MTYPE_EVENT 0x60 /* ICE event memory */
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#define MTYPE_SPM 0xA0 /* flash through LPM/SPM */
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#define MTYPE_FLASH_PAGE 0xB0 /* flash in programming mode */
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#define MTYPE_IO_SHADOW 0x30 /* cached IO registers? */
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#define MTYPE_SRAM 0x20 /* target's SRAM or [ext.] IO registers */
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#define MTYPE_EEPROM 0x22 /* EEPROM, what way? */
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#define MTYPE_EVENT 0x60 /* ICE event memory */
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#define MTYPE_SPM 0xA0 /* flash through LPM/SPM */
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#define MTYPE_FLASH_PAGE 0xB0 /* flash in programming mode */
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#define MTYPE_EEPROM_PAGE 0xB1 /* EEPROM in programming mode */
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#define MTYPE_FUSE_BITS 0xB2 /* fuse bits in programming mode */
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#define MTYPE_LOCK_BITS 0xB3 /* lock bits in programming mode */
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#define MTYPE_SIGN_JTAG 0xB4 /* signature in programming mode */
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#define MTYPE_FUSE_BITS 0xB2 /* fuse bits in programming mode */
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#define MTYPE_LOCK_BITS 0xB3 /* lock bits in programming mode */
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#define MTYPE_SIGN_JTAG 0xB4 /* signature in programming mode */
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#define MTYPE_OSCCAL_BYTE 0xB5 /* osccal cells in programming mode */
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#define MTYPE_CAN 0xB6 /* CAN mailbox */
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#define MTYPE_FLASH 0xc0 /* xmega flash - undocumented in AVR067 */
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#define MTYPE_USERSIG 0xc5 /* xmega user signature - undocumented in AVR067 */
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#define MTYPE_PRODSIG 0xc6 /* xmega production signature - undocumented in AVR067 */
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#define MTYPE_CAN 0xB6 /* CAN mailbox */
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#define MTYPE_FLASH 0xc0 /* xmega flash - undocumented in AVR067 */
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#define MTYPE_USERSIG 0xc5 /* xmega user signature - undocumented in AVR067 */
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#define MTYPE_PRODSIG 0xc6 /* xmega production signature - undocumented in AVR067 */
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/* (some) ICE parameters, for CMND_{GET,SET}_PARAMETER */
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#define PAR_HW_VERSION 0x01
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#define PAR_FW_VERSION 0x02
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#define PAR_EMULATOR_MODE 0x03
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# define EMULATOR_MODE_DEBUGWIRE 0x00
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# define EMULATOR_MODE_JTAG 0x01
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# define EMULATOR_MODE_HV 0x02 /* HVSP or PP mode of AVR Dragon */
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# define EMULATOR_MODE_SPI 0x03
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# define EMULATOR_MODE_JTAG_AVR32 0x04
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# define EMULATOR_MODE_JTAG_XMEGA 0x05
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# define EMULATOR_MODE_PDI 0x06
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#define PAR_IREG 0x04
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#define PAR_BAUD_RATE 0x05
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# define PAR_BAUD_2400 0x01
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# define PAR_BAUD_4800 0x02
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# define PAR_BAUD_9600 0x03
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# define PAR_BAUD_19200 0x04 /* default */
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# define PAR_BAUD_38400 0x05
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# define PAR_BAUD_57600 0x06
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# define PAR_BAUD_115200 0x07
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# define PAR_BAUD_14400 0x08
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#define PAR_OCD_VTARGET 0x06
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#define PAR_OCD_JTAG_CLK 0x07
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#define PAR_OCD_BREAK_CAUSE 0x08
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#define PAR_TIMERS_RUNNING 0x09
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#define PAR_BREAK_ON_CHANGE_FLOW 0x0A
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#define PAR_BREAK_ADDR1 0x0B
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#define PAR_BREAK_ADDR2 0x0C
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#define PAR_COMBBREAKCTRL 0x0D
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#define PAR_JTAGID 0x0E
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#define PAR_UNITS_BEFORE 0x0F
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#define PAR_UNITS_AFTER 0x10
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#define PAR_BIT_BEFORE 0x11
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#define PAR_BIT_ATER 0x12
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#define PAR_EXTERNAL_RESET 0x13
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#define PAR_FLASH_PAGE_SIZE 0x14
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#define PAR_EEPROM_PAGE_SIZE 0x15
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#define PAR_UNUSED1 0x16
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#define PAR_PSB0 0x17
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#define PAR_PSB1 0x18
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#define PAR_PROTOCOL_DEBUG_EVENT 0x19
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#define PAR_MCU_STATE 0x1A
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# define STOPPED 0x00
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# define RUNNING 0x01
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# define PROGRAMMING 0x02
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#define PAR_DAISY_CHAIN_INFO 0x1B
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#define PAR_BOOT_ADDRESS 0x1C
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#define PAR_TARGET_SIGNATURE 0x1D
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#define PAR_DEBUGWIRE_BAUDRATE 0x1E
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#define PAR_PROGRAM_ENTRY_POINT 0x1F
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#define PAR_PDI_OFFSET_START 0x32
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#define PAR_PDI_OFFSET_END 0x33
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#define PAR_PACKET_PARSING_ERRORS 0x40
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#define PAR_VALID_PACKETS_RECEIVED 0x41
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#define PAR_INTERCOMMUNICATION_TX_FAILURES 0x42
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#define PAR_INTERCOMMUNICATION_RX_FAILURES 0x43
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#define PAR_CRC_ERRORS 0x44
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#define PAR_POWER_SOURCE 0x45
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# define POWER_EXTERNAL 0x00
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# define POWER_USB 0x01
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#define PAR_CAN_FLAG 0x22
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# define DONT_READ_CAN_MAILBOX 0x00
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# define READ_CAN_MAILBOX 0x01
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#define PAR_ENABLE_IDR_IN_RUN_MODE 0x23
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# define ACCESS_OSCCAL 0x00
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# define ACCESS_IDR 0x01
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#define PAR_HW_VERSION 0x01
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#define PAR_FW_VERSION 0x02
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#define PAR_EMULATOR_MODE 0x03
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# define EMULATOR_MODE_DEBUGWIRE 0x00
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# define EMULATOR_MODE_JTAG 0x01
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# define EMULATOR_MODE_HV 0x02 /* HVSP or PP mode of AVR Dragon */
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# define EMULATOR_MODE_SPI 0x03
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# define EMULATOR_MODE_JTAG_AVR32 0x04
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# define EMULATOR_MODE_JTAG_XMEGA 0x05
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# define EMULATOR_MODE_PDI 0x06
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#define PAR_IREG 0x04
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#define PAR_BAUD_RATE 0x05
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# define PAR_BAUD_2400 0x01
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# define PAR_BAUD_4800 0x02
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# define PAR_BAUD_9600 0x03
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# define PAR_BAUD_19200 0x04 /* default */
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# define PAR_BAUD_38400 0x05
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# define PAR_BAUD_57600 0x06
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# define PAR_BAUD_115200 0x07
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# define PAR_BAUD_14400 0x08
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#define PAR_OCD_VTARGET 0x06
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#define PAR_OCD_JTAG_CLK 0x07
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#define PAR_OCD_BREAK_CAUSE 0x08
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#define PAR_TIMERS_RUNNING 0x09
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#define PAR_BREAK_ON_CHANGE_FLOW 0x0A
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#define PAR_BREAK_ADDR1 0x0B
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#define PAR_BREAK_ADDR2 0x0C
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#define PAR_COMBBREAKCTRL 0x0D
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#define PAR_JTAGID 0x0E
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#define PAR_UNITS_BEFORE 0x0F
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#define PAR_UNITS_AFTER 0x10
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#define PAR_BIT_BEFORE 0x11
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#define PAR_BIT_ATER 0x12
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#define PAR_EXTERNAL_RESET 0x13
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#define PAR_FLASH_PAGE_SIZE 0x14
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#define PAR_EEPROM_PAGE_SIZE 0x15
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#define PAR_UNUSED1 0x16
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#define PAR_PSB0 0x17
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#define PAR_PSB1 0x18
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#define PAR_PROTOCOL_DEBUG_EVENT 0x19
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#define PAR_MCU_STATE 0x1A
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# define STOPPED 0x00
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# define RUNNING 0x01
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# define PROGRAMMING 0x02
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#define PAR_DAISY_CHAIN_INFO 0x1B
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#define PAR_BOOT_ADDRESS 0x1C
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#define PAR_TARGET_SIGNATURE 0x1D
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#define PAR_DEBUGWIRE_BAUDRATE 0x1E
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#define PAR_PROGRAM_ENTRY_POINT 0x1F
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#define PAR_PDI_OFFSET_START 0x32
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#define PAR_PDI_OFFSET_END 0x33
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#define PAR_PACKET_PARSING_ERRORS 0x40
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#define PAR_VALID_PACKETS_RECEIVED 0x41
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#define PAR_INTERCOMMUNICATION_TX_FAILURES 0x42
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#define PAR_INTERCOMMUNICATION_RX_FAILURES 0x43
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#define PAR_CRC_ERRORS 0x44
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#define PAR_POWER_SOURCE 0x45
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# define POWER_EXTERNAL 0x00
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# define POWER_USB 0x01
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#define PAR_CAN_FLAG 0x22
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# define DONT_READ_CAN_MAILBOX 0x00
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# define READ_CAN_MAILBOX 0x01
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#define PAR_ENABLE_IDR_IN_RUN_MODE 0x23
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# define ACCESS_OSCCAL 0x00
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# define ACCESS_IDR 0x01
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#define PAR_ALLOW_PAGEPROGRAMMING_IN_SCANCHAIN 0x24
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# define PAGEPROG_NOT_ALLOWED 0x00
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# define PAGEPROG_ALLOWED 0x01
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# define PAGEPROG_NOT_ALLOWED 0x00
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# define PAGEPROG_ALLOWED 0x01
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/* Xmega erase memory types, for CMND_XMEGA_ERASE */
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#define XMEGA_ERASE_CHIP 0x00
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#define XMEGA_ERASE_APP 0x01
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#define XMEGA_ERASE_BOOT 0x02
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#define XMEGA_ERASE_EEPROM 0x03
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#define XMEGA_ERASE_APP_PAGE 0x04
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#define XMEGA_ERASE_BOOT_PAGE 0x05
|
||||
#define XMEGA_ERASE_CHIP 0x00
|
||||
#define XMEGA_ERASE_APP 0x01
|
||||
#define XMEGA_ERASE_BOOT 0x02
|
||||
#define XMEGA_ERASE_EEPROM 0x03
|
||||
#define XMEGA_ERASE_APP_PAGE 0x04
|
||||
#define XMEGA_ERASE_BOOT_PAGE 0x05
|
||||
#define XMEGA_ERASE_EEPROM_PAGE 0x06
|
||||
#define XMEGA_ERASE_USERSIG 0x07
|
||||
#define XMEGA_ERASE_USERSIG 0x07
|
||||
|
||||
/* AVR32 related definitions */
|
||||
#define AVR32_FLASHC_FCR 0xFFFE1400
|
||||
|
|
|
|||
Loading…
Reference in New Issue