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Submitted by Jan Egil Ruud <janegil.ruud@microchip.com>
patch #9482: Add support for UPDI and AVR8X * avrdude.conf.in (xplainedpro_updi): New programmer * avrdude.conf.in (.avr8x, ATtiny1617, ATtiny817): New device family and devices * config_gram.y: add K_OCD_BASE and K_HAS_UPDI * lexer.l: (Ditto.) * doc/avrdude.texi: Document "has_updi" flag * jtag3.c: Implement UPDI * jtag3.h: (Ditto.) * jtag3_private.h: (Ditto.) * libavrdude.h: Add ocd_base value and AVRPART_HAS_UPDI flag * pgm_type.c: Add jtagice3_updi git-svn-id: svn://svn.savannah.nongnu.org/avrdude/trunk/avrdude@1398 81a1dc3b-b13d-400b-aceb-764788c761c2
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@@ -199,6 +199,7 @@ typedef struct opcode {
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#define AVRPART_WRITE 0x0400 /* at least one write operation specified */
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#define AVRPART_HAS_TPI 0x0800 /* part has TPI i/f rather than ISP (ATtiny4/5/9/10) */
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#define AVRPART_IS_AT90S1200 0x1000 /* part is an AT90S1200 (needs special treatment) */
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#define AVRPART_HAS_UPDI 0x2000 /* part has UPDI i/f (AVR8X) */
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#define AVR_DESCLEN 64
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#define AVR_IDLEN 32
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@@ -264,6 +265,7 @@ typedef struct avrpart {
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unsigned short eecr; /* JTAC ICE mkII XML file parameter */
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unsigned int mcu_base; /* Base address of MCU control block in ATxmega devices */
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unsigned int nvm_base; /* Base address of NVM controller in ATxmega devices */
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unsigned int ocd_base; /* Base address of OCD module in AVR8X/UPDI devices */
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int ocdrev; /* OCD revision (JTAGICE3 parameter, from AS6 XML files) */
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OPCODE * op[AVR_OP_MAX]; /* opcodes */
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