2022-11-06 01:29:07 +00:00
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/*
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* avrdude - A Downloader/Uploader for AVR device programmers
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* Copyright (C) 2022, Stefan Rueger <stefan.rueger@urclocks.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* $Id$ */
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#ifndef urclock_private_h__
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#define urclock_private_h__
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#include "avrintel.h"
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// EEPROM or flash cache for bytewise access
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typedef struct {
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int base, size;
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char *page, *copy;
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} Cache;
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2022-11-08 20:14:59 +00:00
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2022-11-06 01:29:07 +00:00
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// STK500v1 protocol constants
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#define Resp_STK_OK 0x10
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#define Resp_STK_INSYNC 0x14
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#define Sync_CRC_EOP 0x20
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#define Cmnd_STK_GET_SYNC 0x30
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#define Cmnd_STK_ENTER_PROGMODE 0x50
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#define Cmnd_STK_LEAVE_PROGMODE 0x51
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#define Cmnd_STK_CHIP_ERASE 0x52
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#define Cmnd_STK_LOAD_ADDRESS 0x55
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#define Cmnd_STK_UNIVERSAL 0x56
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#define Cmnd_STK_PROG_PAGE 0x64
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#define Cmnd_STK_READ_PAGE 0x74
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#define Cmnd_STK_READ_SIGN 0x75
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2022-11-08 20:14:59 +00:00
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// Urprotocol command extensions to STK500v1
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2022-11-06 01:29:07 +00:00
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#define Cmnd_UR_PROG_PAGE_EE 0x00
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#define Cmnd_UR_READ_PAGE_EE 0x01
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#define Cmnd_UR_PROG_PAGE_FL 0x02
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#define Cmnd_UR_READ_PAGE_FL 0x03
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// STK_UNIVERSAL commands for backward compatibility
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#define Subc_STK_UNIVERSAL_LEXT 0x4d000000u // Load extended address
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#define Subc_STK_UNIVERSAL_CE 0xac800000u // Chip erase
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// Urboot protocol side channel info about MCU id and 5 binary bootloader features
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// Number of differnt MCU ids
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#define UB_N_MCU 2040 // MCU id 0..2039
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// 5 bootloader features
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#define UB_RESERVED_1 1
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#define UB_RESERVED_2 2
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#define UB_READ_FLASH 4 // Bootloader can read flash
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#define UB_FLASH_LL_NOR 8 // Bootloader flash programming looks like a NOR memory
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#define UB_CHIP_ERASE 16 // Bootloader has a flash-only chip erase that protects itself
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#define UB_INFO(ub_features, ub_mcuid) (ub_features*UB_N_MCU + ub_mcuid)
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#define UB_FEATURES(ub_info) ((uint16_t)(ub_info)/UB_N_MCU)
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#define UB_MCUID(ub_info) ((uint16_t)(ub_info)%UB_N_MCU)
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/*
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* Urboot layout of top six bytes
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*
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* FLASHEND-5: numblpags, only from v7.5: 1 byte number 1..127 of bootloader flash pages
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* FLASHEND-4: vblvecnum, only from v7.5: 1 byte vector number 1..127 for vector bootloader
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* FLASHEND-3: 2 byte rjmp opcode to bootloader pgm_write_page(sram, flash) or ret opcode
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* FLASHEND-1: capability byte of bootloader
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* FLASHEND-0: version number of bootloader: 5 msb = major version, 3 lsb = minor version
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*/
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// Capability byte of bootloader from version 7.2 onwards
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#define UR_PGMWRITEPAGE 128 // pgm_write_page() can be called from application at FLASHEND+1-4
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2022-11-16 00:42:36 +00:00
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#define UR_AUTOBAUD 128 // Bootloader has autobaud detection (from v7.7)
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2022-11-06 01:29:07 +00:00
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#define UR_EEPROM 64 // EEPROM read/write support
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#define UR_URPROTOCOL 32 // Bootloader uses urprotocol that requires avrdude -c urclock
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#define UR_DUAL 16 // Dual boot
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#define UR_VBLMASK 12 // Vector bootloader bits
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#define UR_VBLPATCHVERIFY 12 // Patch reset/interrupt vectors and show original ones on verify
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#define UR_VBLPATCH 8 // Patch reset/interrupt vectors only (expect an error on verify)
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#define UR_VBL 4 // Merely start application via interrupt vector instead of reset
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#define UR_NO_VBL 0 // Not a vector bootloader, must set fuses to HW bootloader support
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#define UR_PROTECTME 2 // Bootloader safeguards against overwriting itself
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#define UR_RESETFLAGS 1 // Load reset flags into register R2 before starting application
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2022-11-16 00:42:36 +00:00
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#define UR_HAS_CE 1 // Bootloader has Chip Erase (from v7.7)
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2022-11-06 01:29:07 +00:00
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#define verbyte_cv(capver) ((uint8_t) ((uint16_t) (capver) >> 8))
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#define hascapbyte_cv(capver) ({ uint8_t _vh = verbyte_cv(capver); _vh >= 072 && _vh != 0xff; })
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#define hasextendedv_cv(capver) ({ uint8_t _vh = verbyte_cv(capver); _vh >= 075 && _vh != 0xff; })
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#define capabilities_cv(capver) ({ uint16_t _vc = capver; \
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(uint8_t) (hascapbyte_cv(_vc)? _vc&0xff: 0); })
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#define vblvecnum_cv(capver) ({ uint16_t _vc = capver; \
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(uint8_t) (hasextendedv_cv(_vc)? pgm_read_b1(FLASHEND-4): 0); })
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#define numblpages_cv(capver) ({ uint16_t _vc = capver; \
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(uint8_t) (hasextendedv_cv(_vc)? pgm_read_b1(FLASHEND-5): 0); })
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#define blurversion_cv(capver) ({ uint8_t _vh = verbyte_cv(capver); \
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(uint8_t) (_vh >= 072 && _vh != 0xff? _vh: 0); })
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#define vercapis(capver, mask) ({ uint16_t _vi = capver; !!(capabilities_cv(_vi) & (mask)); })
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2022-11-16 00:42:36 +00:00
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#define ispgmwritepage_cv(capver) vercapis(capver, UR_PGMWRITEPAGE) // up to v7.6
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#define isautobaud_cv(capver) vercapis(capver, UR_AUTOBAUD) // from v7.7
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2022-11-06 01:29:07 +00:00
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#define iseeprom_cv(capver) vercapis(capver, UR_EEPROM)
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#define isurprotocol_cv(capver) vercapis(capver, UR_URPROTOCOL)
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#define isdual_cv(capver) vercapis(capver, UR_DUAL)
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#define isvectorbl_cv(capver) vercapis(capver, UR_VBLMASK)
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#define isprotectme_cv(capver) vercapis(capver, UR_PROTECTME)
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2022-11-16 00:42:36 +00:00
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#define isresetflags_cv(capver) vercapis(capver, UR_RESETFLAGS) // up to v7.6
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#define ishas_ce_cv(capver) vercapis(capver, UR_HAS_CE) // from v7.7
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2022-11-06 01:29:07 +00:00
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// Capability bits incl position
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2022-11-16 00:42:36 +00:00
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#define pgmwritepage_bit_cap(cap) ((cap) & UR_PGMWRITEPAGE) // up to v7.6
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#define autibaud_bit_cap(cap) ((cap) & UR_AUTOBAUD) // from v7.7
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2022-11-06 01:29:07 +00:00
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#define eeprom_bit_cap(cap) ((cap) & UR_EEPROM)
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#define dual_bit_cap(cap) ((cap) & UR_DUAL)
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#define vector_bits_cap(cap) ((cap) & UR_VBLMASK))
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#define protectme_bit_cap(cap) ((cap) & UR_PROTECTME)
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#define urprotocol_bit_cap(cap) ((cap) & UR_URPROTOCOL)
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2022-11-16 00:42:36 +00:00
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#define resetflags_bit_cap(cap) ((cap) & UR_RESETFLAGS) // up to v7.6
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#define has_ce_bit_cap(cap) ((cap) & UR_HAS_CE) // from v7.7
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2022-11-06 01:29:07 +00:00
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// Boolean capabilities
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2022-11-16 00:42:36 +00:00
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#define ispgmwritepage_cap(cap) (!!((cap) & UR_PGMWRITEPAGE)) // up to v7.6
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#define isautobaud_cap(cap) (!!((cap) & UR_AUTOBAUD)) // from v7.7
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2022-11-06 01:29:07 +00:00
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#define iseeprom_cap(cap) (!!((cap) & UR_EEPROM))
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#define isdual_cap(cap) (!!((cap) & UR_DUAL))
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#define isvectorbl_cap(cap) (!!((cap) & UR_VBLMASK)))
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#define isprotectme_cap(cap) (!!((cap) & UR_PROTECTME))
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#define isurprotocol_cap(cap) (!!((cap) & UR_URPROTOCOL))
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2022-11-16 00:42:36 +00:00
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#define isresetflags_cap(cap) (!!((cap) & UR_RESETFLAGS)) // up to v7.6
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#define ishas_ce_cap(cap) (!!((cap) & UR_HAS_CE)) // from v7.7
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2022-11-06 01:29:07 +00:00
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// Capability levels 0, 1, 2 or 3
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#define vectorbl_level_cap(cap) (((cap) & UR_VBLMASK)/UR_VBL)
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#endif
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