2020-09-19 21:32:38 +00:00
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/*
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* avrdude - A Downloader/Uploader for AVR device programmers
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* Support for using spidev userspace drivers to communicate directly over SPI
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*
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* Copyright (C) 2013 Kevin Cuzner <kevin@kevincuzner.com>
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* Copyright (C) 2018 Ralf Ramsauer <ralf@vmexit.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Support for inversion of reset pin, Tim Chilton 02/05/2014
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* Review code, rebase to latest trunk, add linux/gpio.h support, Ralf Ramsauer 2018-09-07
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*/
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#include "ac_cfg.h"
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#include "avrdude.h"
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#include "libavrdude.h"
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#include "linuxspi.h"
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#if HAVE_LINUXSPI
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/**
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* Linux Kernel SPI Drivers
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*
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* Copyright (C) 2006 SWAPP
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* Andrea Paterniani <a.paterniani@swapp-eng.it>
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* Copyright (C) 2007 David Brownell (simplification, cleanup)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <errno.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <sys/ioctl.h>
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#include <linux/types.h>
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#include <linux/spi/spidev.h>
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#include <linux/gpio.h>
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#include <stddef.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <math.h>
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#define LINUXSPI "linuxspi"
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static int fd_spidev, fd_gpiochip, fd_linehandle;
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/**
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* @brief Sends/receives a message in full duplex mode
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* @return -1 on failure, otherwise number of bytes sent/recieved
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*/
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static int linuxspi_spi_duplex(PROGRAMMER *pgm, const unsigned char *tx, unsigned char *rx, int len)
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{
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struct spi_ioc_transfer tr;
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int ret;
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tr = (struct spi_ioc_transfer) {
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.tx_buf = (unsigned long)tx,
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.rx_buf = (unsigned long)rx,
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.len = len,
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.delay_usecs = 1,
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2021-11-27 18:21:44 +00:00
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.speed_hz = 1.0 / pgm->bitclock, // seconds to Hz
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2020-09-19 21:32:38 +00:00
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.bits_per_word = 8,
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};
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ret = ioctl(fd_spidev, SPI_IOC_MESSAGE(1), &tr);
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if (ret != len)
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avrdude_message(MSG_INFO, "\n%s: error: Unable to send SPI message\n", progname);
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return (ret == -1) ? -1 : 0;
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}
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static void linuxspi_setup(PROGRAMMER *pgm)
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{
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}
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static void linuxspi_teardown(PROGRAMMER* pgm)
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{
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}
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2021-11-27 15:40:12 +00:00
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static int linuxspi_reset_mcu(PROGRAMMER *pgm, bool active)
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{
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struct gpiohandle_data data;
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int ret;
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/*
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* Set the reset state and keep it. The pin will be released and set back to
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* its initial value, once the fd_gpiochip is closed.
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*/
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data.values[0] = active ^ !(pgm->pinno[PIN_AVR_RESET] & PIN_INVERSE);
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ret = ioctl(fd_linehandle, GPIOHANDLE_SET_LINE_VALUES_IOCTL, &data);
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2021-11-27 15:51:24 +00:00
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#ifdef GPIO_V2_LINE_SET_VALUES_IOCTL
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if (ret == -1) {
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struct gpio_v2_line_values val;
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val.mask = 1;
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val.bits = active ^ !(pgm->pinno[PIN_AVR_RESET] & PIN_INVERSE);
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ret = ioctl(fd_linehandle, GPIO_V2_LINE_SET_VALUES_IOCTL, &val);
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}
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#endif
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2021-11-27 15:40:12 +00:00
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if (ret == -1) {
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ret = -errno;
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avrdude_message(MSG_INFO, "%s error: Unable to set GPIO line %d value\n",
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progname, pgm->pinno[PIN_AVR_RESET] & ~PIN_INVERSE);
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return ret;
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}
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return 0;
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}
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2020-09-19 21:32:38 +00:00
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static int linuxspi_open(PROGRAMMER *pgm, char *port)
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{
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2021-11-27 17:33:49 +00:00
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const char *port_error =
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"%s: error: Unknown port specification. "
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"Please use the format /dev/spidev:/dev/gpiochip[:resetno]\n";
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char port_default[] = "/dev/spidev0.0:/dev/gpiochip0";
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2020-09-19 21:32:38 +00:00
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char *spidev, *gpiochip, *reset_pin;
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struct gpiohandle_request req;
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int ret;
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2021-11-27 17:33:49 +00:00
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if (!strcmp(port, "unknown")) {
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port = port_default;
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2020-09-19 21:32:38 +00:00
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}
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spidev = strtok(port, ":");
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if (!spidev) {
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avrdude_message(MSG_INFO, port_error, progname);
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return -1;
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}
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gpiochip = strtok(NULL, ":");
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if (!gpiochip) {
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avrdude_message(MSG_INFO, port_error, progname);
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return -1;
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}
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/* optional: override reset pin in configuration */
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reset_pin = strtok(NULL, ":");
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if (reset_pin)
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pgm->pinno[PIN_AVR_RESET] = strtoul(reset_pin, NULL, 0);
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strcpy(pgm->port, port);
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fd_spidev = open(pgm->port, O_RDWR);
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if (fd_spidev < 0) {
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avrdude_message(MSG_INFO, "\n%s: error: Unable to open the spidev device %s", progname, pgm->port);
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return -1;
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}
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fd_gpiochip = open(gpiochip, 0);
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if (fd_gpiochip < 0) {
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avrdude_message(MSG_INFO, "\n%s error: Unable to open the gpiochip %s", progname, gpiochip);
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ret = -1;
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goto close_spidev;
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}
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strcpy(req.consumer_label, progname);
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req.lines = 1;
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2021-11-27 15:48:30 +00:00
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req.lineoffsets[0] = pgm->pinno[PIN_AVR_RESET] & ~PIN_INVERSE;
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req.default_values[0] = !!(pgm->pinno[PIN_AVR_RESET] & PIN_INVERSE);
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2020-09-19 21:32:38 +00:00
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req.flags = GPIOHANDLE_REQUEST_OUTPUT;
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ret = ioctl(fd_gpiochip, GPIO_GET_LINEHANDLE_IOCTL, &req);
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2021-11-27 15:51:24 +00:00
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if (ret != -1)
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fd_linehandle = req.fd;
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#ifdef GPIO_V2_GET_LINE_IOCTL
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if (ret == -1) {
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struct gpio_v2_line_request reqv2;
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memset(&reqv2, 0, sizeof(reqv2));
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reqv2.offsets[0] = pgm->pinno[PIN_AVR_RESET] & ~PIN_INVERSE;
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strncpy(reqv2.consumer, progname, sizeof(reqv2.consumer) - 1);
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reqv2.config.flags = GPIO_V2_LINE_FLAG_OUTPUT;
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reqv2.config.num_attrs = 1;
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reqv2.config.attrs[0].attr.id = GPIO_V2_LINE_ATTR_ID_OUTPUT_VALUES;
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reqv2.config.attrs[0].attr.values = !!(pgm->pinno[PIN_AVR_RESET] & PIN_INVERSE);
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reqv2.config.attrs[0].mask = 1;
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reqv2.num_lines = 1;
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ret = ioctl(fd_gpiochip, GPIO_V2_GET_LINE_IOCTL, &reqv2);
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if (ret != -1)
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fd_linehandle = reqv2.fd;
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}
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#endif
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2020-09-19 21:32:38 +00:00
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if (ret == -1) {
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ret = -errno;
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2021-11-27 15:46:10 +00:00
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avrdude_message(MSG_INFO, "%s error: Unable to get GPIO line %d\n",
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progname, pgm->pinno[PIN_AVR_RESET] & ~PIN_INVERSE);
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2020-09-19 21:32:38 +00:00
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goto close_gpiochip;
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}
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2021-11-27 15:40:12 +00:00
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ret = linuxspi_reset_mcu(pgm, true);
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if (ret)
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2020-09-19 21:32:38 +00:00
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goto close_out;
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2021-11-27 18:21:44 +00:00
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if (pgm->baudrate != 0) {
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avrdude_message(MSG_INFO,
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"%s: obsolete use of -b <clock> option for bit clock; use -B <clock>\n",
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progname);
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pgm->bitclock = 1E6 / pgm->baudrate;
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}
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if (pgm->bitclock == 0) {
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avrdude_message(MSG_NOTICE,
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"%s: defaulting bit clock to 200 kHz\n",
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progname);
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pgm->bitclock = 5E-6; // 200 kHz - 5 µs
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}
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2020-09-19 21:32:38 +00:00
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return 0;
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close_out:
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close(fd_linehandle);
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close_gpiochip:
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close(fd_gpiochip);
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close_spidev:
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close(fd_spidev);
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return ret;
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}
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static void linuxspi_close(PROGRAMMER *pgm)
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{
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2021-11-27 15:43:57 +00:00
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close(fd_linehandle);
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2020-09-19 21:32:38 +00:00
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close(fd_spidev);
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close(fd_gpiochip);
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}
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static void linuxspi_disable(PROGRAMMER* pgm)
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{
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}
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static void linuxspi_enable(PROGRAMMER* pgm)
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{
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}
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static void linuxspi_display(PROGRAMMER* pgm, const char* p)
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{
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}
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static int linuxspi_initialize(PROGRAMMER *pgm, AVRPART *p)
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{
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int tries, ret;
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if (p->flags & AVRPART_HAS_TPI) {
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/* We do not support tpi. This is a dedicated SPI thing */
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avrdude_message(MSG_INFO, "%s: error: Programmer " LINUXSPI " does not support TPI\n", progname);
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return -1;
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}
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//enable programming on the part
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tries = 0;
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do
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{
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ret = pgm->program_enable(pgm, p);
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if (ret == 0 || ret == -1)
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break;
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} while(tries++ < 65);
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if (ret)
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avrdude_message(MSG_INFO, "%s: error: AVR device not responding\n", progname);
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return ret;
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}
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static int linuxspi_cmd(PROGRAMMER *pgm, const unsigned char *cmd, unsigned char *res)
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{
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return linuxspi_spi_duplex(pgm, cmd, res, 4);
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}
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static int linuxspi_program_enable(PROGRAMMER *pgm, AVRPART *p)
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{
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unsigned char cmd[4], res[4];
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if (!p->op[AVR_OP_PGM_ENABLE]) {
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avrdude_message(MSG_INFO, "%s: error: program enable instruction not defined for part \"%s\"\n", progname, p->desc);
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return -1;
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}
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memset(cmd, 0, sizeof(cmd));
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avr_set_bits(p->op[AVR_OP_PGM_ENABLE], cmd); //set the cmd
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pgm->cmd(pgm, cmd, res);
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2021-11-27 15:40:12 +00:00
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if (res[2] != cmd[1]) {
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/*
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* From ATtiny441 datasheet:
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*
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* In some systems, the programmer can not guarantee that SCK is held low
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* during power-up. In this case, RESET must be given a positive pulse after
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* SCK has been set to '0'. The duration of the pulse must be at least t RST
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* plus two CPU clock cycles. See Table 25-5 on page 240 for definition of
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* minimum pulse width on RESET pin, t RST
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* 2. Wait for at least 20 ms and then enable serial programming by sending
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* the Programming Enable serial instruction to the MOSI pin
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* 3. The serial programming instructions will not work if the communication
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* is out of synchronization. When in sync, the second byte (0x53) will echo
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* back when issuing the third byte of the Programming Enable instruction
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* ...
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* If the 0x53 did not echo back, give RESET a positive pulse and issue a
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* new Programming Enable command
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*/
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if (linuxspi_reset_mcu(pgm, false))
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return -1;
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2021-11-27 18:21:44 +00:00
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usleep(5);
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2021-11-27 15:40:12 +00:00
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if (linuxspi_reset_mcu(pgm, true))
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return -1;
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usleep(20000);
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2020-09-19 21:32:38 +00:00
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return -2;
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2021-11-27 15:40:12 +00:00
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}
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2020-09-19 21:32:38 +00:00
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return 0;
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}
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static int linuxspi_chip_erase(PROGRAMMER *pgm, AVRPART *p)
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{
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unsigned char cmd[4], res[4];
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if (!p->op[AVR_OP_CHIP_ERASE]) {
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avrdude_message(MSG_INFO, "%s: error: chip erase instruction not defined for part \"%s\"\n", progname, p->desc);
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return -1;
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}
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memset(cmd, 0, sizeof(cmd));
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avr_set_bits(p->op[AVR_OP_CHIP_ERASE], cmd);
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pgm->cmd(pgm, cmd, res);
|
|
|
|
usleep(p->chip_erase_delay);
|
|
|
|
pgm->initialize(pgm, p);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void linuxspi_initpgm(PROGRAMMER *pgm)
|
|
|
|
{
|
|
|
|
strcpy(pgm->type, LINUXSPI);
|
|
|
|
|
|
|
|
pgm_fill_old_pins(pgm); // TODO to be removed if old pin data no longer needed
|
|
|
|
|
|
|
|
/* mandatory functions */
|
|
|
|
pgm->initialize = linuxspi_initialize;
|
|
|
|
pgm->display = linuxspi_display;
|
|
|
|
pgm->enable = linuxspi_enable;
|
|
|
|
pgm->disable = linuxspi_disable;
|
|
|
|
pgm->program_enable = linuxspi_program_enable;
|
|
|
|
pgm->chip_erase = linuxspi_chip_erase;
|
|
|
|
pgm->cmd = linuxspi_cmd;
|
|
|
|
pgm->open = linuxspi_open;
|
|
|
|
pgm->close = linuxspi_close;
|
|
|
|
pgm->read_byte = avr_read_byte_default;
|
|
|
|
pgm->write_byte = avr_write_byte_default;
|
|
|
|
|
|
|
|
/* optional functions */
|
|
|
|
pgm->setup = linuxspi_setup;
|
|
|
|
pgm->teardown = linuxspi_teardown;
|
|
|
|
}
|
|
|
|
|
|
|
|
const char linuxspi_desc[] = "SPI using Linux spidev driver";
|
|
|
|
|
|
|
|
#else /* !HAVE_LINUXSPI */
|
|
|
|
|
|
|
|
void linuxspi_initpgm(PROGRAMMER * pgm)
|
|
|
|
{
|
|
|
|
avrdude_message(MSG_INFO, "%s: Linux SPI driver not available in this configuration\n",
|
|
|
|
progname);
|
|
|
|
}
|
|
|
|
|
|
|
|
const char linuxspi_desc[] = "SPI using Linux spidev driver (not available)";
|
|
|
|
|
|
|
|
#endif /* HAVE_LINUXSPI */
|