2001-09-19 17:04:25 +00:00
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# $Id$
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#
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2003-02-06 05:13:32 +00:00
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# AVRDUDE Configuration File
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2001-09-19 17:04:25 +00:00
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#
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2003-02-06 05:13:32 +00:00
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# This file contains configuration data used by AVRDUDE which describes
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2001-10-14 23:17:26 +00:00
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# the programming hardware pinouts and also provides part definitions.
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2003-02-06 05:13:32 +00:00
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# AVRDUDE's "-C" command line option specifies the location of the
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2001-12-15 22:17:46 +00:00
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# configuration file. The "-c" option names the programmer configuration
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2001-10-14 23:17:26 +00:00
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# which must match one of the entry's "id" parameter. The "-p" option
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2003-02-06 05:13:32 +00:00
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# identifies which part AVRDUDE is going to be programming and must match
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2001-10-14 23:17:26 +00:00
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# one of the parts' "id" parameter.
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2001-09-19 17:04:25 +00:00
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#
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2001-10-14 23:17:26 +00:00
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# Possible entry formats are:
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2001-09-19 17:04:25 +00:00
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#
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2001-10-14 23:17:26 +00:00
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# programmer
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2004-01-03 18:36:44 +00:00
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# id = <id1> [, <id2> [, <id3>] ...] ; # <idN> are quoted strings
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# desc = <description> ; # quoted string
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# type = par | stk500 | avr910; # programmer type
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# baudrate = <num> ; # baudrate for avr910-programmer
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# vcc = <num1> [, <num2> ... ] ; # pin number(s)
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# reset = <num> ; # pin number
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# sck = <num> ; # pin number
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# mosi = <num> ; # pin number
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# miso = <num> ; # pin number
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# errled = <num> ; # pin number
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# rdyled = <num> ; # pin number
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# pgmled = <num> ; # pin number
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# vfyled = <num> ; # pin number
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2001-10-14 23:17:26 +00:00
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# ;
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2001-09-19 17:04:25 +00:00
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#
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2001-10-14 23:17:26 +00:00
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# part
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# id = <id> ; # quoted string
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# desc = <description> ; # quoted string
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2003-03-18 05:49:29 +00:00
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# devicecode = <num> ; # deprecated, use stk500_devcode
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2003-03-17 06:20:02 +00:00
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# stk500_devcode = <num> ; # numeric
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# avr910_devcode = <num> ; # numeric
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2001-10-14 23:17:26 +00:00
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# chip_erase_delay = <num> ; # micro-seconds
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2003-02-21 18:12:57 +00:00
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# pagel = <num> ; # pin name in hex, i.e., 0xD7
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# bs2 = <num> ; # pin name in hex, i.e., 0xA0
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# reset = dedicated | io;
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# retry_pulse = reset | sck;
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2001-11-24 01:44:06 +00:00
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# pgm_enable = <instruction format> ;
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# chip_erase = <instruction format> ;
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# memory <memtype>
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2001-10-16 23:32:30 +00:00
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# paged = <yes/no> ; # yes / no
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2001-10-14 23:17:26 +00:00
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# size = <num> ; # bytes
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2001-10-16 23:32:30 +00:00
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# page_size = <num> ; # bytes
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# num_pages = <num> ; # numeric
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2001-10-14 23:17:26 +00:00
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# min_write_delay = <num> ; # micro-seconds
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# max_write_delay = <num> ; # micro-seconds
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# readback_p1 = <num> ; # byte value
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# readback_p2 = <num> ; # byte value
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2002-02-14 02:59:39 +00:00
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# pwroff_after_write = <yes/no> ; # yes / no
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2001-11-24 01:44:06 +00:00
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# read = <instruction format> ;
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# write = <instruction format> ;
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# read_lo = <instruction format> ;
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# read_hi = <instruction format> ;
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# write_lo = <instruction format> ;
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# write_hi = <instruction format> ;
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# loadpage_lo = <instruction format> ;
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# loadpage_hi = <instruction format> ;
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# writepage = <instruction format> ;
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2001-10-14 23:17:26 +00:00
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# ;
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# ;
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2001-09-19 17:04:25 +00:00
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#
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2001-11-24 01:44:06 +00:00
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# If any of the above parameters are not specified, the default value
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# of 0 is used for numerics or the empty string ("") for string
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2003-02-06 05:13:32 +00:00
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# values. If a required parameter is left empty, AVRDUDE will
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2001-11-24 01:44:06 +00:00
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# complain.
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#
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# NOTES:
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2002-12-01 15:05:56 +00:00
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# * 'devicecode' is the device code used by the STK500 (see codes
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# listed below)
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2001-11-24 01:44:06 +00:00
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# * Not all memory types will implement all instructions.
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# * AVR Fuse bits and Lock bits are implemented as a type of memory.
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# * Example memory types are:
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# "flash", "eeprom", "fuse", "lfuse" (low fuse), "hfuse" (high
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# fuse), "signature", "calibration", "lock"
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2003-02-06 05:13:32 +00:00
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# * The memory type specified on the avrdude command line must match
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2001-11-24 01:44:06 +00:00
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# one of the memory types defined for the specified chip.
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2003-02-06 05:13:32 +00:00
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# * The pwroff_after_write flag causes avrdude to attempt to
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2002-02-14 02:59:39 +00:00
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# power the device off and back on after an unsuccessful write to
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# the affected memory area if VCC programmer pins are defined. If
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# VCC pins are not defined for the programmer, a message
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# indicating that the device needs a power-cycle is printed out.
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# This flag was added to work around a problem with the
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# at90s4433/2333's; see the at90s4433 errata at:
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#
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# http://www.atmel.com/atmel/acrobat/doc1280.pdf
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2001-11-24 01:44:06 +00:00
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#
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# INSTRUCTION FORMATS
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#
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# Instruction formats are specified as a comma seperated list of
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# string values containing information (bit specifiers) about each
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# of the 32 bits of the instruction. Bit specifiers may be one of
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# the following formats:
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#
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# '1' = the bit is always set on input as well as output
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#
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# '0' = the bit is always clear on input as well as output
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#
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# 'x' = the bit is ignored on input and output
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#
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# 'a' = the bit is an address bit, the bit-number matches this bit
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# specifier's position within the current instruction byte
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#
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# 'aN' = the bit is the Nth address bit, bit-number = N, i.e., a12
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# is address bit 12 on input, a0 is address bit 0.
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#
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# 'i' = the bit is an input data bit
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#
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# 'o' = the bit is an output data bit
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#
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# Each instruction must be composed of 32 bit specifiers. The
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# instruction specification closely follows the instruction data
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# provided in Atmel's data sheets for their parts.
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2001-10-14 23:17:26 +00:00
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#
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# See below for some examples.
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#
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2002-12-01 15:05:56 +00:00
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#
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# The following are STK500 part device codes to use for the
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# "devicecode" field of the part. These came from Atmel's software
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# section avr061.zip which accompanies the application note
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# AVR061 available from:
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#
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# http://www.atmel.com/atmel/acrobat/doc2525.pdf
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#
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#define ATTINY10 0x10
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#define ATTINY11 0x11
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#define ATTINY12 0x12
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#define ATTINY22 0x20
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#define ATTINY26 0x21
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#define ATTINY28 0x22
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#define AT90S1200 0x33
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#define AT90S2313 0x40
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#define AT90S2323 0x41
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#define AT90S2333 0x42
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#define AT90S2343 0x43
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#define AT90S4414 0x50
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#define AT90S4433 0x51
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#define AT90S4434 0x52
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#define AT90S8515 0x60
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#define AT90S8535 0x61
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#define AT90C8534 0x62
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#define ATMEGA8515 0x63
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#define ATMEGA8535 0x64
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#define ATMEGA8 0x70
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#define ATMEGA161 0x80
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#define ATMEGA163 0x81
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#define ATMEGA16 0x82
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#define ATMEGA162 0x83
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#define ATMEGA169 0x84
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#define ATMEGA323 0x90
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#define ATMEGA32 0x91
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2003-11-14 04:43:55 +00:00
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#define ATMEGA64 0xA0
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2002-12-01 15:05:56 +00:00
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#define ATMEGA103 0xB1
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#define ATMEGA128 0xB2
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#define AT86RF401 0xD0
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#define AT89START 0xE0
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#define AT89S51 0xE0
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#define AT89S52 0xE1
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2003-02-21 18:46:51 +00:00
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#
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# Overall avrdude defaults
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#
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2003-02-25 00:57:27 +00:00
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default_parallel = "@DEFAULT_PAR_PORT@";
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default_serial = "@DEFAULT_SER_PORT@";
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2003-02-21 18:46:51 +00:00
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2002-12-01 15:05:56 +00:00
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#
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# PROGRAMMER DEFINITIONS
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#
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2001-10-14 23:17:26 +00:00
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programmer
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2003-02-21 21:07:43 +00:00
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id = "bsd";
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2003-08-24 18:31:08 +00:00
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desc = "Brian Dean's Programmer, http://www.bsdhome.com/avrdude/";
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2003-02-13 19:27:50 +00:00
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type = par;
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2001-10-14 23:17:26 +00:00
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vcc = 2, 3, 4, 5;
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reset = 7;
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sck = 8;
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mosi = 9;
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miso = 10;
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;
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2003-03-04 16:28:25 +00:00
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programmer
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id = "avrisp";
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desc = "Atmel AVR ISP";
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type = stk500;
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;
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2002-12-01 04:30:01 +00:00
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programmer
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id = "stk500";
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desc = "Atmel STK500";
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type = stk500;
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;
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2003-03-16 18:19:37 +00:00
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programmer
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id = "avr910";
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desc = "Atmel Low Cost Serial Programmer";
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type = avr910;
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;
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2003-11-30 15:16:48 +00:00
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programmer
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id = "butterfly";
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desc = "Atmel Butterfly Development Board";
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type = butterfly;
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;
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2003-03-16 18:19:37 +00:00
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programmer
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id = "pavr";
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desc = "Jason Kyle's pAVR Serial Programmer";
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type = avr910;
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;
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2001-12-29 21:37:20 +00:00
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programmer
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id = "stk200";
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desc = "STK200";
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2003-02-13 19:27:50 +00:00
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type = par;
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2001-12-29 21:37:20 +00:00
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buff = 4, 5;
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sck = 6;
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mosi = 7;
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reset = 9;
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miso = 10;
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;
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2003-03-05 13:47:37 +00:00
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# The programming dongle used by the popular Ponyprog
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# utility. It is almost similar to the STK200 one,
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# except that there is a LED indicating that the
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# programming is currently in progress.
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programmer
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2003-04-17 17:34:01 +00:00
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id = "pony-stk200";
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desc = "Pony Prog STK200";
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2003-03-05 13:47:37 +00:00
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type = par;
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buff = 4, 5;
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sck = 6;
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mosi = 7;
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reset = 9;
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miso = 10;
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pgmled = 8;
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;
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2001-10-14 23:17:26 +00:00
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programmer
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id = "dt006";
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desc = "Dontronics DT006";
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2003-02-13 19:27:50 +00:00
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type = par;
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2001-10-14 23:17:26 +00:00
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reset = 4;
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2001-10-15 00:16:12 +00:00
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sck = 5;
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mosi = 2;
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miso = 11;
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2001-10-14 23:17:26 +00:00
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;
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2003-03-17 17:57:55 +00:00
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programmer
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id = "bascom";
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desc = "Bascom SAMPLE programming cable";
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type = par;
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reset = 4;
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sck = 5;
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mosi = 2;
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miso = 11;
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;
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2001-10-14 23:17:26 +00:00
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programmer
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id = "alf";
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2003-08-24 18:31:08 +00:00
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desc = "Nightshade ALF-PgmAVR, http://nightshade.homeip.net/";
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2003-02-13 19:27:50 +00:00
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type = par;
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2001-10-14 23:17:26 +00:00
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vcc = 2, 3, 4, 5;
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buff = 6;
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reset = 7;
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sck = 8;
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mosi = 9;
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miso = 10;
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errled = 1;
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rdyled = 14;
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pgmled = 16;
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vfyled = 17;
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;
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2003-06-18 02:47:52 +00:00
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programmer
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id = "sp12";
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desc = "Steve Bolt's Programmer";
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type = par;
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vcc = 4,5,6,7,8;
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reset = 3;
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sck = 2;
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mosi = 9;
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miso = 11;
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;
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2003-07-22 01:29:19 +00:00
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programmer
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id = "picoweb";
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2003-08-24 18:31:08 +00:00
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desc = "Picoweb Programming Cable, http://www.picoweb.net/";
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2003-07-22 01:29:19 +00:00
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type = par;
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reset = 2;
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sck = 3;
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mosi = 4;
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miso = 13;
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;
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2001-12-29 21:47:05 +00:00
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2003-10-02 18:59:47 +00:00
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programmer
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id = "abcmini";
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desc = "ABCmini Board, aka Dick Smith HOTCHIP";
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type = par;
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reset = 4;
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sck = 3;
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mosi = 2;
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miso = 10;
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;
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2002-12-01 04:30:01 +00:00
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2004-01-27 15:16:16 +00:00
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programmer
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|
|
id = "futurlec";
|
|
|
|
desc = "Futurlec.com programming cable.";
|
|
|
|
type = par;
|
|
|
|
reset = 3;
|
|
|
|
sck = 2;
|
|
|
|
mosi = 1;
|
|
|
|
miso = 10;
|
|
|
|
;
|
2002-12-01 04:30:01 +00:00
|
|
|
|
2002-12-01 15:05:56 +00:00
|
|
|
#
|
|
|
|
# PART DEFINITIONS
|
|
|
|
#
|
2002-12-01 04:30:01 +00:00
|
|
|
|
2003-06-17 21:35:39 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATtiny12
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "t12";
|
|
|
|
desc = "ATtiny12";
|
|
|
|
stk500_devcode = 0x12;
|
2003-11-20 04:05:53 +00:00
|
|
|
avr910_devcode = 0x55;
|
2003-06-17 21:35:39 +00:00
|
|
|
chip_erase_delay = 20000;
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
|
|
|
size = 64;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = "1 0 1 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 1 0 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "flash"
|
|
|
|
size = 1024;
|
|
|
|
min_write_delay = 4500;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"0 0 0 0 0 0 a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x o o x";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
|
|
|
size = 1;
|
|
|
|
read = "0 0 1 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 x x x x x",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATtiny15
|
|
|
|
#------------------------------------------------------------
|
2002-12-01 04:30:01 +00:00
|
|
|
|
2002-06-22 14:03:53 +00:00
|
|
|
part
|
|
|
|
id = "t15";
|
|
|
|
desc = "ATtiny15";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x13;
|
2003-06-17 21:35:39 +00:00
|
|
|
avr910_devcode = 0x56;
|
2003-11-20 04:05:53 +00:00
|
|
|
chip_erase_delay = 8200;
|
2002-06-22 14:03:53 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
|
|
|
size = 64;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 8200;
|
|
|
|
max_write_delay = 8200;
|
2002-06-22 14:03:53 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = "1 0 1 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 1 0 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "flash"
|
|
|
|
size = 1024;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 4100;
|
|
|
|
max_write_delay = 4100;
|
2002-06-22 14:03:53 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"0 0 0 0 0 0 a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x o o x";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
|
|
|
size = 1;
|
|
|
|
read = "0 0 1 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x o o o o x x o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 x x x x x",
|
|
|
|
"x x x x x x x x i i i i 1 1 i i";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# AT90s1200
|
|
|
|
#------------------------------------------------------------
|
2001-12-29 21:47:05 +00:00
|
|
|
|
2001-10-14 23:17:26 +00:00
|
|
|
part
|
|
|
|
id = "1200";
|
|
|
|
desc = "AT90S1200";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x33;
|
|
|
|
avr910_devcode = 0x13;
|
2003-05-14 03:54:17 +00:00
|
|
|
pagel = 0xd7;
|
|
|
|
bs2 = 0xa0;
|
2001-10-14 23:17:26 +00:00
|
|
|
chip_erase_delay = 20000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 64;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 4000;
|
|
|
|
max_write_delay = 9000;
|
2001-10-14 23:17:26 +00:00
|
|
|
readback_p1 = 0x00;
|
|
|
|
readback_p2 = 0xff;
|
2001-12-29 21:37:20 +00:00
|
|
|
read = "1 0 1 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2001-12-29 21:37:20 +00:00
|
|
|
write = "1 1 0 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 1024;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 4000;
|
|
|
|
max_write_delay = 9000;
|
2001-10-14 23:17:26 +00:00
|
|
|
readback_p1 = 0xff;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
2001-11-24 01:44:06 +00:00
|
|
|
" i i i i i i i i";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2002-02-14 02:48:07 +00:00
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
read = "0 1 0 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x o o x";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# AT90s4414
|
|
|
|
#------------------------------------------------------------
|
2002-02-14 02:48:07 +00:00
|
|
|
|
|
|
|
part
|
|
|
|
id = "4414";
|
|
|
|
desc = "AT90S4414";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x50;
|
2003-05-02 16:23:30 +00:00
|
|
|
avr910_devcode = 0x28;
|
2002-02-14 02:48:07 +00:00
|
|
|
chip_erase_delay = 20000;
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
|
|
|
size = 256;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0x80;
|
|
|
|
readback_p2 = 0x7f;
|
|
|
|
read = " 1 0 1 0 0 0 0 0 x x x x x x x a8",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0 x x x x x x x a8",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "flash"
|
|
|
|
size = 4096;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0x7f;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0x7f;
|
2002-02-14 02:48:07 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# AT90s2313
|
|
|
|
#------------------------------------------------------------
|
2001-10-16 02:47:55 +00:00
|
|
|
|
2001-10-14 23:17:26 +00:00
|
|
|
part
|
|
|
|
id = "2313";
|
|
|
|
desc = "AT90S2313";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x40;
|
2003-05-02 16:23:30 +00:00
|
|
|
avr910_devcode = 0x20;
|
2001-10-14 23:17:26 +00:00
|
|
|
chip_erase_delay = 20000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 128;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 4000;
|
|
|
|
max_write_delay = 9000;
|
2001-10-14 23:17:26 +00:00
|
|
|
readback_p1 = 0x80;
|
|
|
|
readback_p2 = 0x7f;
|
2001-12-29 21:37:20 +00:00
|
|
|
read = "1 0 1 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2001-12-29 21:37:20 +00:00
|
|
|
write = "1 1 0 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 2048;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 4000;
|
|
|
|
max_write_delay = 9000;
|
2001-10-14 23:17:26 +00:00
|
|
|
readback_p1 = 0x7f;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0x7f;
|
2001-11-21 05:50:59 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
2001-11-24 01:44:06 +00:00
|
|
|
" i i i i i i i i";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x i i x",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
|
|
|
;
|
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# AT90s2333
|
|
|
|
#------------------------------------------------------------
|
2001-10-16 02:47:55 +00:00
|
|
|
|
2001-10-14 23:17:26 +00:00
|
|
|
part
|
|
|
|
id = "2333";
|
|
|
|
desc = "AT90S2333";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x42;
|
2003-06-17 21:35:39 +00:00
|
|
|
avr910_devcode = 0x34;
|
2001-10-14 23:17:26 +00:00
|
|
|
chip_erase_delay = 20000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 128;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0x00;
|
|
|
|
readback_p2 = 0xff;
|
2001-12-29 21:37:20 +00:00
|
|
|
read = "1 0 1 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2001-12-29 21:37:20 +00:00
|
|
|
write = "1 1 0 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 2048;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0xff;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
2001-11-24 01:44:06 +00:00
|
|
|
" i i i i i i i i";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2002-02-09 21:53:51 +00:00
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
2002-02-15 02:06:58 +00:00
|
|
|
pwroff_after_write = yes;
|
2002-02-09 21:53:51 +00:00
|
|
|
read = "0 1 0 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x o o x";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
|
|
|
|
2003-02-19 09:01:54 +00:00
|
|
|
|
|
|
|
#------------------------------------------------------------
|
|
|
|
# AT90s2343
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "2343";
|
|
|
|
desc = "AT90S2343";
|
2003-05-02 16:23:30 +00:00
|
|
|
stk500_devcode = 0x43;
|
|
|
|
avr910_devcode = 0x4c;
|
2003-02-19 09:01:54 +00:00
|
|
|
chip_erase_delay = 18000;
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
|
|
|
size = 128;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0x00;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = "1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "flash"
|
|
|
|
size = 2048;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0xff;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0xff;
|
2003-02-19 09:01:54 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x o o o x x x x o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 1 1 1 1 i",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x o o o x x x x o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# AT90s4433
|
|
|
|
#------------------------------------------------------------
|
2001-10-16 02:47:55 +00:00
|
|
|
|
2001-10-14 23:17:26 +00:00
|
|
|
part
|
|
|
|
id = "4433";
|
|
|
|
desc = "AT90S4433";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x51;
|
2003-05-02 16:23:30 +00:00
|
|
|
avr910_devcode = 0x30;
|
2001-10-14 23:17:26 +00:00
|
|
|
chip_erase_delay = 20000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 256;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0x00;
|
|
|
|
readback_p2 = 0xff;
|
2001-12-30 00:07:29 +00:00
|
|
|
read = " 1 0 1 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2001-12-30 00:07:29 +00:00
|
|
|
write = " 1 1 0 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 4096;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0xff;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x x a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
2001-11-24 01:44:06 +00:00
|
|
|
" i i i i i i i i";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2002-02-09 21:53:51 +00:00
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
2002-02-15 02:06:58 +00:00
|
|
|
pwroff_after_write = yes;
|
2002-02-09 21:53:51 +00:00
|
|
|
read = "0 1 0 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x o o x";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# AT90s4434
|
|
|
|
#------------------------------------------------------------
|
2001-10-16 02:47:55 +00:00
|
|
|
|
2001-10-14 23:17:26 +00:00
|
|
|
part
|
|
|
|
id = "4434";
|
|
|
|
desc = "AT90S4434";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x52;
|
2003-05-02 16:23:30 +00:00
|
|
|
avr910_devcode = 0x6c;
|
2001-10-14 23:17:26 +00:00
|
|
|
chip_erase_delay = 20000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 256;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0x00;
|
|
|
|
readback_p2 = 0xff;
|
2001-12-29 21:37:20 +00:00
|
|
|
read = " 1 0 1 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2001-12-29 21:37:20 +00:00
|
|
|
write = " 1 1 0 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 4096;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0xff;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x x a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
2001-11-24 01:44:06 +00:00
|
|
|
" i i i i i i i i";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2002-02-14 02:48:07 +00:00
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
read = "0 1 0 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x o o x";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-09-19 17:04:25 +00:00
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# AT90s8515
|
|
|
|
#------------------------------------------------------------
|
2001-10-16 02:47:55 +00:00
|
|
|
|
2001-10-14 23:17:26 +00:00
|
|
|
part
|
|
|
|
id = "8515";
|
|
|
|
desc = "AT90S8515";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x60;
|
|
|
|
avr910_devcode = 0x38;
|
2001-10-14 23:17:26 +00:00
|
|
|
chip_erase_delay = 20000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
2003-03-05 02:33:30 +00:00
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
2001-11-21 05:50:59 +00:00
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 512;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 4000;
|
|
|
|
max_write_delay = 9000;
|
2001-10-14 23:17:26 +00:00
|
|
|
readback_p1 = 0x80;
|
|
|
|
readback_p2 = 0x7f;
|
2001-12-29 21:37:20 +00:00
|
|
|
read = " 1 0 1 0 0 0 0 0 x x x x x x x a8",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2001-12-29 21:37:20 +00:00
|
|
|
write = " 1 1 0 0 0 0 0 0 x x x x x x x a8",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 8192;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 4000;
|
|
|
|
max_write_delay = 9000;
|
2001-10-14 23:17:26 +00:00
|
|
|
readback_p1 = 0x7f;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0x7f;
|
2001-11-21 05:50:59 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
2001-11-24 01:44:06 +00:00
|
|
|
" i i i i i i i i";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2002-02-14 02:48:07 +00:00
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x x o";
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 1 1 1 1 i",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x o o x x x x x x";
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-09-19 17:04:25 +00:00
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# AT90s8535
|
|
|
|
#------------------------------------------------------------
|
2001-10-16 02:47:55 +00:00
|
|
|
|
2001-10-14 23:17:26 +00:00
|
|
|
part
|
|
|
|
id = "8535";
|
|
|
|
desc = "AT90S8535";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x61;
|
2003-05-02 16:23:30 +00:00
|
|
|
avr910_devcode = 0x68;
|
2001-10-14 23:17:26 +00:00
|
|
|
chip_erase_delay = 20000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 512;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0x00;
|
|
|
|
readback_p2 = 0xff;
|
2001-12-29 21:37:20 +00:00
|
|
|
read = " 1 0 1 0 0 0 0 0 x x x x x x x a8",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2001-12-29 21:37:20 +00:00
|
|
|
write = " 1 1 0 0 0 0 0 0 x x x x x x x a8",
|
|
|
|
"a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 8192;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 20000;
|
|
|
|
readback_p1 = 0xff;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
2001-11-24 01:44:06 +00:00
|
|
|
" i i i i i i i i";
|
2001-11-21 05:50:59 +00:00
|
|
|
|
|
|
|
write_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2003-11-08 21:15:42 +00:00
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x x o";
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 1 1 1 1 i",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x o o x x x x x x";
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-09-19 17:04:25 +00:00
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega103
|
|
|
|
#------------------------------------------------------------
|
2001-10-16 02:47:55 +00:00
|
|
|
|
2001-10-14 23:17:26 +00:00
|
|
|
part
|
2001-10-31 02:18:08 +00:00
|
|
|
id = "m103";
|
2001-10-14 23:17:26 +00:00
|
|
|
desc = "ATMEGA103";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0xB1;
|
2003-05-02 16:23:30 +00:00
|
|
|
avr910_devcode = 0x41;
|
2001-10-14 23:17:26 +00:00
|
|
|
chip_erase_delay = 112000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 4096;
|
|
|
|
min_write_delay = 4000;
|
|
|
|
max_write_delay = 9000;
|
|
|
|
readback_p1 = 0x00;
|
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-16 23:32:30 +00:00
|
|
|
paged = yes;
|
2001-10-14 23:17:26 +00:00
|
|
|
size = 131072;
|
2001-10-16 23:32:30 +00:00
|
|
|
page_size = 256;
|
|
|
|
num_pages = 512;
|
2001-10-14 23:17:26 +00:00
|
|
|
min_write_delay = 22000;
|
|
|
|
max_write_delay = 56000;
|
|
|
|
readback_p1 = 0xff;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0xff;
|
2002-04-07 16:03:58 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
"a15 a14 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
"a15 a14 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
"a15 a14 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 x x x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x o x o 1 o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 1 i 1 i i",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x o o x";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
2001-10-14 23:17:26 +00:00
|
|
|
;
|
2001-09-19 17:04:25 +00:00
|
|
|
|
2001-10-16 02:47:55 +00:00
|
|
|
|
2003-11-14 04:43:55 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega64
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "m64";
|
|
|
|
desc = "ATMEGA64";
|
|
|
|
stk500_devcode = 0xA0;
|
|
|
|
chip_erase_delay = 9000;
|
|
|
|
pagel = 0xD7;
|
|
|
|
bs2 = 0xA0;
|
|
|
|
reset = dedicated;
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
|
|
|
paged = no; /* leave this "no" */
|
|
|
|
page_size = 8; /* for parallel programming */
|
|
|
|
size = 2048;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 9000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "flash"
|
|
|
|
paged = yes;
|
|
|
|
size = 65536;
|
|
|
|
page_size = 256;
|
|
|
|
num_pages = 256;
|
|
|
|
min_write_delay = 4500;
|
2003-11-20 04:05:53 +00:00
|
|
|
max_write_delay = 4500;
|
2003-11-14 04:43:55 +00:00
|
|
|
readback_p1 = 0xff;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0xff;
|
2003-11-14 04:43:55 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x a14 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x a14 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" x a14 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 x x x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "efuse"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0",
|
|
|
|
"x x x x x x x x x x x x x x i i";
|
|
|
|
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
|
|
|
size = 1;
|
|
|
|
read = "0 0 1 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega128
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
2002-04-05 22:41:38 +00:00
|
|
|
part
|
|
|
|
id = "m128";
|
|
|
|
desc = "ATMEGA128";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0xB2;
|
2003-11-20 04:05:53 +00:00
|
|
|
avr910_devcode = 0x43;
|
2002-04-05 22:41:38 +00:00
|
|
|
chip_erase_delay = 9000;
|
2003-02-20 14:11:34 +00:00
|
|
|
pagel = 0xD7;
|
|
|
|
bs2 = 0xA0;
|
|
|
|
reset = dedicated;
|
2002-04-05 22:41:38 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2003-02-20 14:11:34 +00:00
|
|
|
paged = no; /* leave this "no" */
|
|
|
|
page_size = 8; /* for parallel programming */
|
2002-04-05 22:41:38 +00:00
|
|
|
size = 4096;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 9000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" x x x x a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2002-04-05 22:41:38 +00:00
|
|
|
memory "flash"
|
|
|
|
paged = yes;
|
|
|
|
size = 131072;
|
|
|
|
page_size = 256;
|
|
|
|
num_pages = 512;
|
|
|
|
min_write_delay = 4500;
|
2003-11-20 04:05:53 +00:00
|
|
|
max_write_delay = 4500;
|
2002-04-05 22:41:38 +00:00
|
|
|
readback_p1 = 0xff;
|
2003-11-20 04:05:53 +00:00
|
|
|
readback_p2 = 0xff;
|
2002-04-05 22:41:38 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
"a15 a14 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
"a15 a14 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
"a15 a14 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 x x x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
|
2002-10-11 19:32:12 +00:00
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
2002-04-05 22:41:38 +00:00
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2002-04-05 22:41:38 +00:00
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
|
2002-10-11 19:32:12 +00:00
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
2002-04-05 22:41:38 +00:00
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2002-04-05 22:41:38 +00:00
|
|
|
memory "efuse"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0",
|
|
|
|
"x x x x x x x x x x x x x x i i";
|
|
|
|
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2002-04-05 22:41:38 +00:00
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2002-04-05 22:41:38 +00:00
|
|
|
memory "calibration"
|
|
|
|
size = 1;
|
|
|
|
read = "0 0 1 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2002-04-05 22:41:38 +00:00
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega16
|
|
|
|
#------------------------------------------------------------
|
2002-04-05 22:41:38 +00:00
|
|
|
|
2001-10-16 02:47:55 +00:00
|
|
|
part
|
2001-10-31 02:18:08 +00:00
|
|
|
id = "m16";
|
2001-10-16 02:47:55 +00:00
|
|
|
desc = "ATMEGA16";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x82;
|
2003-11-20 04:05:53 +00:00
|
|
|
avr910_devcode = 0x74;
|
2003-03-05 01:42:57 +00:00
|
|
|
pagel = 0xd7;
|
|
|
|
bs2 = 0xa0;
|
2001-10-16 02:47:55 +00:00
|
|
|
chip_erase_delay = 9000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
2002-04-07 16:03:58 +00:00
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
2001-11-21 05:50:59 +00:00
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-16 02:47:55 +00:00
|
|
|
size = 512;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 9000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
2002-04-07 16:03:58 +00:00
|
|
|
" 0 0 x x x x a9 a8",
|
2001-11-21 05:50:59 +00:00
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
2002-04-07 16:03:58 +00:00
|
|
|
" 0 0 x x x x a9 a8",
|
2001-11-21 05:50:59 +00:00
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
2001-10-16 02:47:55 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-16 23:32:30 +00:00
|
|
|
paged = yes;
|
2001-10-16 02:47:55 +00:00
|
|
|
size = 16384;
|
2001-10-16 23:32:30 +00:00
|
|
|
page_size = 128;
|
|
|
|
num_pages = 128;
|
2001-10-16 02:47:55 +00:00
|
|
|
min_write_delay = 4500;
|
2003-11-20 04:05:53 +00:00
|
|
|
max_write_delay = 4500;
|
2001-10-16 02:47:55 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
2002-04-07 16:03:58 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" 0 0 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" 0 0 x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" 0 0 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 x x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
2001-10-16 02:47:55 +00:00
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
2001-10-16 02:47:55 +00:00
|
|
|
;
|
|
|
|
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2003-09-08 14:51:28 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega162
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "m162";
|
|
|
|
desc = "ATMEGA162";
|
|
|
|
stk500_devcode = 0x83;
|
2003-11-20 04:05:53 +00:00
|
|
|
chip_erase_delay = 9000;
|
2003-09-08 14:51:28 +00:00
|
|
|
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "flash"
|
|
|
|
paged = yes;
|
|
|
|
size = 16384;
|
|
|
|
page_size = 128;
|
|
|
|
num_pages = 128;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 4500;
|
|
|
|
max_write_delay = 4500;
|
2003-09-08 14:51:28 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
|
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" 0 0 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" 0 0 x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" 0 0 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 x x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "eeprom"
|
|
|
|
size = 512;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 9000;
|
2003-09-08 14:51:28 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
|
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 16000;
|
|
|
|
max_write_delay = 16000;
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 16000;
|
|
|
|
max_write_delay = 16000;
|
|
|
|
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "efuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 16000;
|
|
|
|
max_write_delay = 16000;
|
|
|
|
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0",
|
|
|
|
"x x x x x x x x 1 1 1 i i i i 1";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 16000;
|
|
|
|
max_write_delay = 16000;
|
|
|
|
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
|
|
|
|
read = "0 0 1 1 0 0 0 0 0 0 x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
|
|
|
size = 1;
|
|
|
|
|
|
|
|
read = "0 0 1 1 1 0 0 0 0 0 x x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
|
|
|
|
2001-11-21 05:50:59 +00:00
|
|
|
|
|
|
|
#------------------------------------------------------------
|
2003-02-18 18:47:59 +00:00
|
|
|
# ATmega163
|
2001-11-21 05:50:59 +00:00
|
|
|
#------------------------------------------------------------
|
2003-02-18 18:47:59 +00:00
|
|
|
|
2001-11-17 20:48:17 +00:00
|
|
|
part
|
|
|
|
id = "m163";
|
|
|
|
desc = "ATMEGA163";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x81;
|
2003-05-02 16:23:30 +00:00
|
|
|
avr910_devcode = 0x64;
|
2001-11-17 20:48:17 +00:00
|
|
|
chip_erase_delay = 32000;
|
2003-03-05 01:42:57 +00:00
|
|
|
pagel = 0xd7;
|
|
|
|
bs2 = 0xa0;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
memory "eeprom"
|
2001-11-17 20:48:17 +00:00
|
|
|
size = 512;
|
|
|
|
min_write_delay = 4000;
|
|
|
|
max_write_delay = 4000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
2001-11-17 20:48:17 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2001-11-21 02:46:55 +00:00
|
|
|
memory "flash"
|
2001-11-17 20:48:17 +00:00
|
|
|
paged = yes;
|
|
|
|
size = 16384;
|
|
|
|
page_size = 128;
|
|
|
|
num_pages = 128;
|
|
|
|
min_write_delay = 16000;
|
|
|
|
max_write_delay = 16000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" x x x a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 x x x x x x",
|
|
|
|
" x x x x x x x x";
|
2001-11-21 02:46:55 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2001-11-21 02:46:55 +00:00
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
2001-11-21 05:50:59 +00:00
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o x x o o o o";
|
2001-11-21 02:46:55 +00:00
|
|
|
|
2001-11-21 05:50:59 +00:00
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i 1 1 i i i i";
|
2001-11-17 20:48:17 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2001-11-21 02:46:55 +00:00
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
2001-11-21 05:50:59 +00:00
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x x x x x 1 o o o";
|
2001-11-21 02:46:55 +00:00
|
|
|
|
2001-11-21 05:50:59 +00:00
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x 1 1 1 1 1 i i i";
|
2001-11-21 02:46:55 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2001-11-21 02:46:55 +00:00
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
2001-11-21 05:50:59 +00:00
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x 0 x x x x x o o o o o o";
|
2001-11-21 02:46:55 +00:00
|
|
|
|
2001-11-21 05:50:59 +00:00
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
2001-11-21 02:46:55 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2001-11-21 02:46:55 +00:00
|
|
|
memory "signature"
|
2001-11-21 05:50:59 +00:00
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
2001-11-21 02:46:55 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
2001-11-21 02:46:55 +00:00
|
|
|
memory "calibration"
|
2001-11-21 05:50:59 +00:00
|
|
|
size = 1;
|
|
|
|
read = "0 0 1 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
2001-11-17 20:48:17 +00:00
|
|
|
;
|
|
|
|
|
2003-02-18 19:09:07 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega169
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "m169";
|
|
|
|
desc = "ATMEGA169";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x85;
|
2003-11-30 15:16:48 +00:00
|
|
|
avr910_devcode = 0x75;
|
2003-11-20 04:05:53 +00:00
|
|
|
chip_erase_delay = 9000;
|
2003-02-18 19:09:07 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
memory "eeprom"
|
|
|
|
size = 512;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 9000;
|
2003-02-18 19:09:07 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "flash"
|
|
|
|
paged = yes;
|
|
|
|
size = 16384;
|
|
|
|
page_size = 128;
|
|
|
|
num_pages = 128;
|
2003-11-20 04:05:53 +00:00
|
|
|
min_write_delay = 4500;
|
|
|
|
max_write_delay = 4500;
|
2003-02-18 19:09:07 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" x x x a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 x x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "efuse"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0",
|
|
|
|
"x x x x x x x x x x x x x x i i";
|
|
|
|
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
|
|
|
size = 1;
|
|
|
|
read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2003-03-29 15:02:07 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega32
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "m32";
|
|
|
|
desc = "ATMEGA32";
|
|
|
|
stk500_devcode = 0x91;
|
2003-05-02 16:23:30 +00:00
|
|
|
avr910_devcode = 0x72;
|
2003-11-20 04:05:53 +00:00
|
|
|
chip_erase_delay = 9000;
|
2003-03-29 15:02:07 +00:00
|
|
|
pagel = 0xd7;
|
|
|
|
bs2 = 0xa0;
|
|
|
|
reset = dedicated;
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
memory "eeprom"
|
|
|
|
paged = no; /* leave this "no" */
|
|
|
|
page_size = 4; /* for parallel programming */
|
|
|
|
size = 1024;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 9000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "flash"
|
|
|
|
paged = yes;
|
|
|
|
size = 32768;
|
|
|
|
page_size = 128;
|
|
|
|
num_pages = 256;
|
|
|
|
min_write_delay = 4500;
|
2003-11-20 04:05:53 +00:00
|
|
|
max_write_delay = 4500;
|
2003-03-29 15:02:07 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" 0 0 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" 0 0 x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" 0 0 a13 a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 x x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
|
|
|
size = 1;
|
|
|
|
read = "0 0 1 1 1 0 0 0 0 0 x x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
2003-11-20 04:05:53 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega161
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "m161";
|
|
|
|
desc = "ATMEGA161";
|
|
|
|
stk500_devcode = 0x80;
|
|
|
|
avr910_devcode = 0x60;
|
|
|
|
chip_erase_delay = 28000;
|
|
|
|
pagel = 0xd7;
|
|
|
|
bs2 = 0xa0;
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
memory "eeprom"
|
|
|
|
size = 512;
|
|
|
|
min_write_delay = 3400;
|
|
|
|
max_write_delay = 3400;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "flash"
|
|
|
|
paged = yes;
|
|
|
|
size = 16384;
|
|
|
|
page_size = 128;
|
|
|
|
num_pages = 128;
|
|
|
|
min_write_delay = 14000;
|
|
|
|
max_write_delay = 14000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x x a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" x x x a12 a11 a10 a9 a8",
|
|
|
|
" a7 a6 x x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "fuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x o x o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 i 1 i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
2003-03-29 15:02:07 +00:00
|
|
|
|
2003-02-18 18:47:59 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega8
|
|
|
|
#------------------------------------------------------------
|
2001-11-21 05:50:59 +00:00
|
|
|
|
2001-10-31 02:18:08 +00:00
|
|
|
part
|
|
|
|
id = "m8";
|
|
|
|
desc = "ATMEGA8";
|
2003-03-17 06:20:02 +00:00
|
|
|
stk500_devcode = 0x70;
|
2003-11-20 04:05:53 +00:00
|
|
|
avr910_devcode = 0x76;
|
2003-03-05 01:42:57 +00:00
|
|
|
pagel = 0xd7;
|
|
|
|
bs2 = 0xc2;
|
2001-10-31 02:18:08 +00:00
|
|
|
chip_erase_delay = 9000;
|
2001-11-21 05:50:59 +00:00
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
2002-04-07 16:03:58 +00:00
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
2001-11-21 05:50:59 +00:00
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
2001-10-31 02:18:08 +00:00
|
|
|
size = 512;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 9000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
2001-11-21 05:50:59 +00:00
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
2002-04-07 16:03:58 +00:00
|
|
|
" 0 0 x x x x x a8",
|
2001-11-21 05:50:59 +00:00
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
2002-04-07 16:03:58 +00:00
|
|
|
" 0 0 x x x x x a8",
|
2001-11-21 05:50:59 +00:00
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
2001-10-31 02:18:08 +00:00
|
|
|
;
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "flash"
|
2001-10-31 02:18:08 +00:00
|
|
|
paged = yes;
|
2003-04-16 22:44:55 +00:00
|
|
|
size = 8192;
|
|
|
|
page_size = 64;
|
|
|
|
num_pages = 128;
|
|
|
|
min_write_delay = 4500;
|
2003-11-20 04:05:53 +00:00
|
|
|
max_write_delay = 4500;
|
2003-04-16 22:44:55 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 0 0 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" 0 0 0 0 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 0 0 x x x x",
|
|
|
|
" x x x a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" 0 0 0 0 x x x x",
|
|
|
|
" x x x a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" 0 0 0 0 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
2003-06-17 21:35:39 +00:00
|
|
|
size = 4;
|
|
|
|
read = "0 0 1 1 1 0 0 0 0 0 x x x x x x",
|
|
|
|
"0 0 0 0 0 0 a1 a0 o o o o o o o o";
|
2003-04-16 22:44:55 +00:00
|
|
|
;
|
|
|
|
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
;
|
|
|
|
|
|
|
|
|
2003-10-13 17:53:56 +00:00
|
|
|
|
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega8515
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "m8515";
|
|
|
|
desc = "ATMEGA8515";
|
|
|
|
stk500_devcode = 0x63;
|
2003-11-20 04:05:53 +00:00
|
|
|
avr910_devcode = 0x3A;
|
2003-10-13 17:53:56 +00:00
|
|
|
chip_erase_delay = 9000;
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
|
|
|
size = 512;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 9000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "flash"
|
|
|
|
paged = yes;
|
|
|
|
size = 8192;
|
|
|
|
page_size = 64;
|
|
|
|
num_pages = 128;
|
|
|
|
min_write_delay = 4500;
|
2003-11-20 04:05:53 +00:00
|
|
|
max_write_delay = 4500;
|
2003-10-13 17:53:56 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 0 0 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" 0 0 0 0 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 0 0 x x x x",
|
|
|
|
" x x x a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" 0 0 0 0 x x x x",
|
|
|
|
" x x x a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" 0 0 0 0 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 4500;
|
|
|
|
max_write_delay = 4500;
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 4500;
|
|
|
|
max_write_delay = 4500;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 4500;
|
|
|
|
max_write_delay = 4500;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
|
|
|
size = 1;
|
|
|
|
read = "0 0 1 1 1 0 0 0 0 0 x x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
2003-10-13 21:20:01 +00:00
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
2003-10-13 17:53:56 +00:00
|
|
|
;
|
|
|
|
;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2003-04-16 22:44:55 +00:00
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATmega8535
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "m8535";
|
|
|
|
desc = "ATMEGA8535";
|
2003-04-17 22:50:41 +00:00
|
|
|
stk500_devcode = 0x64;
|
2003-04-16 22:44:55 +00:00
|
|
|
pagel = 0xd7;
|
|
|
|
bs2 = 0xa0;
|
|
|
|
chip_erase_delay = 9000;
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
|
|
|
size = 512;
|
|
|
|
min_write_delay = 9000;
|
|
|
|
max_write_delay = 9000;
|
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = " 1 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
write = " 1 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 x x x x x a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
;
|
|
|
|
memory "flash"
|
|
|
|
paged = yes;
|
2001-10-31 02:18:08 +00:00
|
|
|
size = 8192;
|
|
|
|
page_size = 64;
|
|
|
|
num_pages = 128;
|
|
|
|
min_write_delay = 4500;
|
2003-11-20 04:05:53 +00:00
|
|
|
max_write_delay = 4500;
|
2001-10-31 02:18:08 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
2002-04-07 16:03:58 +00:00
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" 0 0 0 0 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" 0 0 0 0 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" 0 0 0 0 x x x x",
|
|
|
|
" x x x a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" 0 0 0 0 x x x x",
|
|
|
|
" x x x a4 a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" 0 0 0 0 a11 a10 a9 a8",
|
|
|
|
" a7 a6 a5 x x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
2001-10-31 02:18:08 +00:00
|
|
|
;
|
2002-04-07 16:03:58 +00:00
|
|
|
|
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
min_write_delay = 2000;
|
|
|
|
max_write_delay = 2000;
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x x x o o o o o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x",
|
|
|
|
"x x x x x x x x 1 1 i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
|
|
|
size = 1;
|
|
|
|
read = "0 0 1 1 1 0 0 0 0 0 x x x x x x",
|
|
|
|
"0 0 0 0 0 0 0 0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
2001-11-21 05:50:59 +00:00
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x a1 a0 o o o o o o o o";
|
|
|
|
;
|
2001-10-31 02:18:08 +00:00
|
|
|
;
|
|
|
|
|
2003-04-16 23:00:29 +00:00
|
|
|
|
|
|
|
#------------------------------------------------------------
|
|
|
|
# ATtiny26
|
|
|
|
#------------------------------------------------------------
|
|
|
|
|
|
|
|
part
|
|
|
|
id = "t26";
|
|
|
|
desc = "ATTINY26";
|
|
|
|
stk500_devcode = 0x21;
|
2003-11-20 04:05:53 +00:00
|
|
|
avr910_devcode = 0x5e;
|
2003-04-16 23:00:29 +00:00
|
|
|
pagel = 0xb3;
|
|
|
|
bs2 = 0xb2;
|
|
|
|
chip_erase_delay = 9000;
|
|
|
|
pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
|
|
|
|
memory "eeprom"
|
|
|
|
size = 128;
|
|
|
|
min_write_delay = 9000;
|
2003-11-20 04:05:53 +00:00
|
|
|
max_write_delay = 9000;
|
2003-04-16 23:00:29 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read = "1 0 1 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o";
|
|
|
|
|
|
|
|
write = "1 1 0 0 0 0 0 0 x x x x x x x x",
|
|
|
|
"x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "flash"
|
|
|
|
paged = yes;
|
|
|
|
size = 2048;
|
|
|
|
page_size = 32;
|
|
|
|
num_pages = 64;
|
|
|
|
min_write_delay = 4500;
|
2003-11-20 04:05:53 +00:00
|
|
|
max_write_delay = 4500;
|
2003-04-16 23:00:29 +00:00
|
|
|
readback_p1 = 0xff;
|
|
|
|
readback_p2 = 0xff;
|
|
|
|
read_lo = " 0 0 1 0 0 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
read_hi = " 0 0 1 0 1 0 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 a3 a2 a1 a0",
|
|
|
|
" o o o o o o o o";
|
|
|
|
|
|
|
|
loadpage_lo = " 0 1 0 0 0 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x x x x a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
loadpage_hi = " 0 1 0 0 1 0 0 0",
|
|
|
|
" x x x x x x x x",
|
|
|
|
" x x x x a3 a2 a1 a0",
|
|
|
|
" i i i i i i i i";
|
|
|
|
|
|
|
|
writepage = " 0 1 0 0 1 1 0 0",
|
|
|
|
" x x x x x x a9 a8",
|
|
|
|
" a7 a6 a5 a4 x x x x",
|
|
|
|
" x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "signature"
|
|
|
|
size = 3;
|
|
|
|
read = "0 0 1 1 0 0 0 0 x x x x x x x x",
|
|
|
|
"0 0 0 0 0 0 a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lock"
|
|
|
|
size = 1;
|
|
|
|
read = "0 1 0 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"x x x x x x x x x x x x x x o o";
|
|
|
|
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 1 1 1 1 1 i i",
|
|
|
|
"x x x x x x x x x x x x x x x x";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "lfuse"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0",
|
|
|
|
"x x x x x x x x i i i i i i i i";
|
|
|
|
|
|
|
|
read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0",
|
|
|
|
"x x x x x x x x o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "hfuse"
|
|
|
|
size = 1;
|
|
|
|
write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0",
|
|
|
|
"x x x x x x x x x x x i i i i i";
|
|
|
|
|
|
|
|
read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0",
|
|
|
|
"x x x x x x x x x x x o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
memory "calibration"
|
|
|
|
size = 4;
|
|
|
|
read = "0 0 1 1 1 0 0 0 x x x x x x x x",
|
|
|
|
"0 0 0 0 0 0 a1 a0 o o o o o o o o";
|
|
|
|
;
|
|
|
|
|
|
|
|
;
|
|
|
|
|